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Message-Id: <166603728603.4991.3891583761325602602.b4-ty@linaro.org>
Date: Mon, 17 Oct 2022 16:08:12 -0400
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Rob Herring <robh+dt@...nel.org>, Shawn Guo <shawn.guo@...aro.org>,
Andy Gross <agross@...nel.org>, linux-gpio@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
krishna Lanka <quic_vamslank@...cinc.com>,
linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
linux-arm-msm@...r.kernel.org, Vinod Koul <vkoul@...nel.org>,
devicetree@...r.kernel.org, Stephan Gerhold <stephan@...hold.net>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Rob Herring <robh@...nel.org>
Subject: Re: (subset) [PATCH v5 31/34] dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
On Sun, 16 Oct 2022 13:00:32 -0400, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
>
Applied, thanks!
[31/34] dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/c535fe66f4a5df69c57faca1fc04a6c1b50240b9
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
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