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Message-Id: <20221017091201.199457-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Mon, 17 Oct 2022 10:11:59 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
soc@...nel.org, linux-arm-kernel@...ts.infradead.org,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv@...ts.infradead.org
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Samuel Holland <samuel@...lland.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [RFC RESEND PATCH 0/2] RZ/G2UL separate out SoC specific parts
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Hi All,
This patch series aims to split up the RZ/G2UL SoC DTSI into common parts
so that this can be shared with the RZ/Five SoC.
Implementation is based on the discussion [0] where I have used option#2.
The Renesas RZ/G2UL (ARM64) and RZ/Five (RISC-V) have almost the same
identical blocks to avoid duplication a base SoC dtsi (r9a07g043.dtsi) is
created which will be used by the RZ/G2UL (r9a07g043u.dtsi) and RZ/Five
(r9a07g043F.dtsi)
Sending this as an RFC to get some feedback.
r9a07g043f.dtsi will look something like below:
#include <dt-bindings/interrupt-controller/irq.h>
#define SOC_PERIPHERAL_IRQ_NUMBER(nr) (nr + 32)
#define SOC_PERIPHERAL_IRQ(nr, na) SOC_PERIPHERAL_IRQ_NUMBER(nr) na
#include <arm64/renesas/r9a07g043.dtsi>
/ {
...
...
};
Although patch#2 can be merged into patch#1 just wanted to keep them separated
for easier review.
RFC-> RESEND RFC
* Patches rebased on [1]
RFC: [2]
[0] https://lore.kernel.org/linux-arm-kernel/Yyt8s5+pyoysVNeC@spud/T/
[1] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221009230044.10961-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
[2] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20220929172356.301342-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
Lad Prabhakar (2):
arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro
to specify interrupt property
arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 347 ++++++++----------
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 72 ++++
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 2 +-
3 files changed, 220 insertions(+), 201 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
--
2.25.1
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