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Message-Id: <555WJR.ESJD0KDHOG3S@crapouillou.net>
Date: Mon, 17 Oct 2022 10:31:53 +0100
From: Paul Cercueil <paul@...pouillou.net>
To: Siarhei Volkau <lis8215@...il.com>
Cc: Arnd Bergmann <arnd@...db.de>, kernel test robot <lkp@...el.com>,
kbuild-all@...ts.01.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Vinod Koul <vkoul@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Linus Walleij <linus.walleij@...aro.org>,
Jiri Slaby <jirislaby@...nel.org>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org, linux-serial@...r.kernel.org,
linux-mips@...r.kernel.org,
GPIO SUBSYSTEM <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 7/8] serial: 8250/ingenic: Add support for the
JZ4750/JZ4755 SoCs
Hi Siarhei,
Le dim., oct. 16 2022 at 21:39:48 +0300, Siarhei Volkau
<lis8215@...il.com> a écrit :
> чт, 13 окт. 2022 г. в 21:56, Siarhei Volkau
> <lis8215@...il.com>:
>
>> > Just disable the divider in ingenic_fixup_fdt() in
>
>> I'll check that.
>
> I checked that approach: serial seems to be working as expected,
> but not all the time: there's a time period when the CGU driver
> started but serial console driver is still early one.
> In my case UART produces garbage at that period since CGU
> needs to enable clock divider back: ext is 24MHz but 12MHz
> required for audio codec and USB to function properly.
What I'd do, is just force-enable it to 12 MHz in ingenic_fixup_fdt(),
since the programming manual basically says that 24 MHz does not work
properly.
Then in the earlycon setup code hardcode the /2 divider with a big fat
comment about why it's there.
Cheers,
-Paul
> So I think Arnd's approach:
>
>> the hardware should already be in a working state,
>> with no need to touch it during early boot.
>
> shall resolve the problem, although I can't check it on all supported
> hardware.
>
> BR,
> Siarhei
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