linux-kernel - Re: [PATCH] ARM: dts: at91: sama7g5: fix signal name of pin PB2

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <b79fb530-f3ba-cc09-1838-cc84ad37175f@microchip.com>
Date:   Mon, 17 Oct 2022 10:15:54 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <Mihai.Sain@...rochip.com>, <robh+dt@...nel.org>,
        <Eugen.Hristev@...rochip.com>, <Claudiu.Beznea@...rochip.com>,
        <Nicolas.Ferre@...rochip.com>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: at91: sama7g5: fix signal name of pin PB2

On 10/17/22 11:31, Mihai Sain wrote:
> The signal name of pin PB2 with function F is FLEXCOM11_IO1
> as it is defined in the datasheet.
> 
> Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
> Signed-off-by: Mihai Sain <mihai.sain@...rochip.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@...rochip.com>

> ---
>  arch/arm/boot/dts/sama7g5-pinfunc.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/sama7g5-pinfunc.h b/arch/arm/boot/dts/sama7g5-pinfunc.h
> index 4eb30445d205..6e87f0d4b8fc 100644
> --- a/arch/arm/boot/dts/sama7g5-pinfunc.h
> +++ b/arch/arm/boot/dts/sama7g5-pinfunc.h
> @@ -261,7 +261,7 @@
>  #define PIN_PB2__FLEXCOM6_IO0		PINMUX_PIN(PIN_PB2, 2, 1)
>  #define PIN_PB2__ADTRG			PINMUX_PIN(PIN_PB2, 3, 1)
>  #define PIN_PB2__A20			PINMUX_PIN(PIN_PB2, 4, 1)
> -#define PIN_PB2__FLEXCOM11_IO0		PINMUX_PIN(PIN_PB2, 6, 3)
> +#define PIN_PB2__FLEXCOM11_IO1		PINMUX_PIN(PIN_PB2, 6, 3)
>  #define PIN_PB3				35
>  #define PIN_PB3__GPIO			PINMUX_PIN(PIN_PB3, 0, 0)
>  #define PIN_PB3__RF1			PINMUX_PIN(PIN_PB3, 1, 1)
> 

-- 
Cheers,
ta