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Message-Id: <20221017104141.7338-10-linux@fw-web.de>
Date: Mon, 17 Oct 2022 12:41:38 +0200
From: Frank Wunderlich <linux@...web.de>
To: linux-mediatek@...ts.infradead.org
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Sam Shih <sam.shih@...iatek.com>,
Vic Wu <vic.wu@...iatek.com>
Subject: [RFC v1 09/12] arm64: dts: mt7986: add crypto related device nodes
From: Sam Shih <sam.shih@...iatek.com>
This patch adds crypto engine support for MT7986.
Signed-off-by: Vic Wu <vic.wu@...iatek.com>
Signed-off-by: Sam Shih <sam.shih@...iatek.com>
Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 4 ++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 4 ++++
3 files changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 1a6ae2f05afa..7e339f5ded59 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -43,6 +43,10 @@ reg_5v: regulator-5v {
};
};
+&crypto {
+ status = "okay";
+};
+
ð {
status = "okay";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index e48846e18b04..aac129c6f295 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -206,6 +206,21 @@ trng: trng@...0f000 {
status = "disabled";
};
+ crypto: crypto@...20000 {
+ compatible = "inside-secure,safexcel-eip97";
+ reg = <0 0x10320000 0 0x40000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ring0", "ring1", "ring2", "ring3";
+ clocks = <&infracfg CLK_INFRA_EIP97_CK>;
+ clock-names = "infra_eip97_ck";
+ assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;
+ assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
+ status = "disabled";
+ };
+
uart0: serial@...02000 {
compatible = "mediatek,mt7986-uart",
"mediatek,mt6577-uart";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
index cd1763fa7f19..a98025112b5a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
@@ -43,6 +43,10 @@ reg_5v: regulator-5v {
};
};
+&crypto {
+ status = "okay";
+};
+
ð {
status = "okay";
--
2.34.1
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