[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y05jLAjYR+JldAqD@ziggy.stardust>
Date: Tue, 18 Oct 2022 10:26:20 +0200
From: Matthias Brugger <matthias.bgg@...nel.org>
To: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Michael Zhu <michael.zhu@...rfivetech.com>,
Drew Fustini <drew@...gleboard.org>,
Emil Renner Berthing <kernel@...il.dk>,
Conor Dooley <conor.dooley@...rochip.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH v4 3/3] riscv: dts: starfive: Add StarFive VisionFive V1
device tree
On Tue, Oct 18, 2022 at 12:05:42AM +0300, Cristian Ciocaltea wrote:
> Add initial device tree for the StarFive VisionFive V1 SBC [1], which
> is similar with the already supported BeagleV Starlight Beta board,
> both being based on the StarFive JH7100 SoC.
>
> [1] https://github.com/starfive-tech/VisionFive
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Reviewed-by: Matthias Brugger <mbrugger@...e.com>
> ---
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> .../jh7100-starfive-visionfive-v1.dts | 20 +++++++++++++++++++
> 2 files changed, 21 insertions(+), 1 deletion(-)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
>
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 0ea1bc15ab30..039c143cba33 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -1,2 +1,2 @@
> # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb
> +dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
> new file mode 100644
> index 000000000000..e82af72f1aaf
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2021 StarFive Technology Co., Ltd.
> + * Copyright (C) 2021 Emil Renner Berthing <kernel@...il.dk>
> + */
> +
> +/dts-v1/;
> +#include "jh7100-common.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "StarFive VisionFive V1";
> + compatible = "starfive,visionfive-v1", "starfive,jh7100";
> +
> + gpio-restart {
> + compatible = "gpio-restart";
> + gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
> + priority = <224>;
> + };
> +};
> --
> 2.38.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Powered by blists - more mailing lists