linux-kernel - Re: [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA

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Date:   Wed, 19 Oct 2022 15:55:10 +0200
From:   Heiko Stuebner <heiko@...ech.de>
To:     Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Anup Patel <apatel@...tanamicro.com>
Cc:     Atish Patra <atishp@...shpatra.org>,
        Anup Patel <anup@...infault.org>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Andrew Jones <ajones@...tanamicro.com>,
        kernel test robot <lkp@...el.com>,
        Anup Patel <apatel@...tanamicro.com>,
        Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM

Am Mittwoch, 19. Oktober 2022, 15:11:25 CEST schrieb Anup Patel:
> From: Andrew Jones <ajones@...tanamicro.com>
> 
> riscv_cbom_block_size and riscv_init_cbom_blocksize() should always
> be available and riscv_init_cbom_blocksize() should always be
> invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This
> is because disabling RISCV_ISA_ZICBOM means "don't use zicbom
> instructions in the kernel" not "pretend there isn't zicbom, even
> when there is". When zicbom is available, whether the kernel enables
> its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests.
> Ensure we can build KVM and that the block size is initialized even
> when compiling without RISCV_ISA_ZICBOM.
> 
> Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> Reported-by: kernel test robot <lkp@...el.com>
> Signed-off-by: Andrew Jones <ajones@...tanamicro.com>
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

Reviewed-by: Heiko Stuebner <heiko@...ech.de>

[on qemu+zicbom and t-head d1]
Tested-by: Heiko Stuebner <heiko@...ech.de>