lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20221019072621.lh5hcznggbcscihf@pengutronix.de>
Date:   Wed, 19 Oct 2022 09:26:21 +0200
From:   Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
To:     Robin Murphy <robin.murphy@....com>
Cc:     Johan Jonker <jbx6244@...il.com>, heiko@...ech.de,
        thierry.reding@...il.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, sebastian.reichel@...labora.com,
        wxt@...k-chips.com, kever.yang@...k-chips.com,
        linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH v1 2/2] ARM: dts: rk3288: add the interrupts property
 for PWM

On Thu, Sep 29, 2022 at 04:50:43PM +0100, Robin Murphy wrote:
> On 2022-09-29 15:04, Johan Jonker wrote:
> > The Rockchip rk3288 SoC has 4-built-in PWM channels.
> > 
> > Configurable to operate in capture mode.
> > Measures the high/low polarity effective cycles of this input waveform
> > Generates a single interrupt at the transition of input waveform polarity
> > 
> > Configurable to operate in continuous mode or one-shot mode.
> > One-shot operation will produce N + 1 periods of the waveform,
> > where N is the repeat counter value, and generates a single interrupt at
> > the end of operation.
> > Continuous mode generates the waveform continuously and
> > do not generates any interrupts.
> > 
> > Add interrupts property to rk3288 PWM nodes.
> 
> As far as I can make out from the TRM, these are only valid when
> GRF_SOC_CON2[0] = 0, otherwise it's in "new" RK_PWM mode using SPI 78 for
> all channels. Which apparently will be the case for anyone using upstream
> U-Boot:
> 
> https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-rockchip/rk3288/rk3288.c#L83

Huh, so it depends on a (software) setting which irqs are in use? So the
patch isn't correct as is, but I have no idea how to make it right.
Should we rely on the bootloader to fixup the dtb correctly?

Anyhow, I'm marking the patch as 'changes-requested' in our patchwork
instance.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ