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Message-ID: <1718196085461c37138c194c49146efa5c5503dc.1666288432.git.quic_asutoshd@quicinc.com>
Date: Thu, 20 Oct 2022 11:03:32 -0700
From: Asutosh Das <quic_asutoshd@...cinc.com>
To: <quic_cang@...cinc.com>, <martin.petersen@...cle.com>,
<linux-scsi@...r.kernel.org>
CC: <quic_nguyenb@...cinc.com>, <quic_xiaosenh@...cinc.com>,
<stanley.chu@...iatek.com>, <eddie.huang@...iatek.com>,
<daejun7.park@...sung.com>, <bvanassche@....org>,
<avri.altman@....com>, <mani@...nel.org>, <beanhuo@...ron.com>,
<quic_richardp@...cinc.com>,
"Asutosh Das" <quic_asutoshd@...cinc.com>,
<linux-arm-msm@...r.kernel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
"open list" <linux-kernel@...r.kernel.org>
Subject: [PATCH v3 03/17] ufs: core: Introduce Multi-circular queue capability
Add support to check for MCQ capability in the UFSHC.
This capability can be used by host drivers to control
MCQ enablement.
Co-developed-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@...cinc.com>
---
drivers/ufs/core/ufshcd.c | 4 ++++
include/ufs/ufshcd.h | 13 +++++++++++++
2 files changed, 17 insertions(+)
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index e2be3f4..8d93797 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -2250,6 +2250,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
if (err)
dev_err(hba->dev, "crypto setup failed\n");
+ hba->mcq_sup = FIELD_GET(MASK_MCQ_SUPPORT, hba->capabilities);
+ if (!hba->mcq_sup)
+ return err;
+
hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP);
hba->ext_iid_sup = FIELD_GET(MASK_EXT_IID_SUPPORT,
hba->mcq_capabilities);
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index c29f4c8..e779bc6 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -660,6 +660,12 @@ enum ufshcd_caps {
* notification if it is supported by the UFS device.
*/
UFSHCD_CAP_TEMP_NOTIF = 1 << 11,
+
+ /*
+ * This capability allows the host controller driver to turn on/off
+ * MCQ mode. MCQ mode may be used to increase performance.
+ */
+ UFSHCD_CAP_MCQ_EN = 1 << 12,
};
struct ufs_hba_variant_params {
@@ -820,6 +826,7 @@ struct ufs_hba_monitor {
* @complete_put: whether or not to call ufshcd_rpm_put() from inside
* ufshcd_resume_complete()
* @ext_iid_sup: is EXT_IID is supported by UFSHC
+ * @mcq_sup: is mcq supported by UFSHC
*/
struct ufs_hba {
void __iomem *mmio_base;
@@ -969,8 +976,14 @@ struct ufs_hba {
u32 luns_avail;
bool complete_put;
bool ext_iid_sup;
+ bool mcq_sup;
};
+static inline bool is_mcq_supported(struct ufs_hba *hba)
+{
+ return hba->mcq_sup && (hba->caps & UFSHCD_CAP_MCQ_EN);
+}
+
/* Returns true if clocks can be gated. Otherwise false */
static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
{
--
2.7.4
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