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Message-Id: <20221020063624.17548-1-zhuyinbo@loongson.cn>
Date: Thu, 20 Oct 2022 14:36:22 +0800
From: Yinbo Zhu <zhuyinbo@...ngson.cn>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Huacai Chen <chenhuacai@...nel.org>,
WANG Xuerui <kernel@...0n.name>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Jianmin Lv <lvjianmin@...ngson.cn>,
Yang Li <yang.lee@...ux.alibaba.com>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev,
Yinbo Zhu <zhuyinbo@...ngson.cn>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v3 1/3] dt-bindings: clock: add loongson2 clock include file
This file defines all loongson2 soc clock indexes, it should be
included in the device tree in which there's device using the
clocks.
Signed-off-by: Yinbo Zhu <zhuyinbo@...ngson.cn>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Change in v3:
1. Add the review information.
MAINTAINERS | 6 ++++
include/dt-bindings/clock/loongson,ls2k-clk.h | 29 +++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 include/dt-bindings/clock/loongson,ls2k-clk.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0be0f520c032..b6aae412de9c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11907,6 +11907,12 @@ S: Maintained
F: Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml
F: drivers/thermal/loongson2_thermal.c
+LOONGSON2 SOC SERIES CLOCK DRIVER
+M: Yinbo Zhu <zhuyinbo@...ngson.cn>
+L: linux-clk@...r.kernel.org
+S: Maintained
+F: include/dt-bindings/clock/loongson,ls2k-clk.h
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@...adcom.com>
M: Sreekanth Reddy <sreekanth.reddy@...adcom.com>
diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h
new file mode 100644
index 000000000000..db1e27e792ff
--- /dev/null
+++ b/include/dt-bindings/clock/loongson,ls2k-clk.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Author: Yinbo Zhu <zhuyinbo@...ngson.cn>
+ * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
+#define __DT_BINDINGS_CLOCK_LOONGSON2_H
+
+#define LOONGSON2_REF_100M 0
+#define LOONGSON2_NODE_PLL 1
+#define LOONGSON2_DDR_PLL 2
+#define LOONGSON2_DC_PLL 3
+#define LOONGSON2_PIX0_PLL 4
+#define LOONGSON2_PIX1_PLL 5
+#define LOONGSON2_NODE_CLK 6
+#define LOONGSON2_HDA_CLK 7
+#define LOONGSON2_GPU_CLK 8
+#define LOONGSON2_DDR_CLK 9
+#define LOONGSON2_GMAC_CLK 10
+#define LOONGSON2_DC_CLK 11
+#define LOONGSON2_APB_CLK 12
+#define LOONGSON2_USB_CLK 13
+#define LOONGSON2_SATA_CLK 14
+#define LOONGSON2_PIX0_CLK 15
+#define LOONGSON2_PIX1_CLK 16
+#define LOONGSON2_CLK_END 17
+
+#endif
--
2.31.1
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