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Message-Id: <20221020101702.1867188-5-peng.fan@oss.nxp.com>
Date:   Thu, 20 Oct 2022 18:16:59 +0800
From:   "Peng Fan (OSS)" <peng.fan@....nxp.com>
To:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        shawnguo@...nel.org, s.hauer@...gutronix.de
Cc:     kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, Peng Fan <peng.fan@....com>,
        Jacky Bai <ping.bai@....com>, Ye Li <ye.li@....com>
Subject: [PATCH 4/7] arm64: dts: imx93: add MU clock for mailbox

From: Peng Fan <peng.fan@....com>

Add MU clock for mailbox usage

Reviewed-by: Jacky Bai <ping.bai@....com>
Reviewed-by: Ye Li <ye.li@....com>
Signed-off-by: Peng Fan <peng.fan@....com>
---
 arch/arm64/boot/dts/freescale/imx93.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 2d983e6ee734..c886ad0f6499 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -135,6 +135,7 @@ mu1: mailbox@...30000 {
 				compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 				reg = <0x44230000 0x10000>;
 				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX93_CLK_MU1_B_GATE>;
 				#mbox-cells = <2>;
 				status = "disabled";
 			};
@@ -271,6 +272,7 @@ mu2: mailbox@...40000 {
 				compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 				reg = <0x42440000 0x10000>;
 				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX93_CLK_MU2_B_GATE>;
 				#mbox-cells = <2>;
 				status = "disabled";
 			};
-- 
2.37.1

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