lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 20 Oct 2022 21:26:47 -0500
From:   Rob Herring <robh@...nel.org>
To:     Tinghan Shen <tinghan.shen@...iatek.com>
Cc:     Ryder Lee <ryder.lee@...iatek.com>,
        Jianjun Wang <jianjun.wang@...iatek.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        linux-pci@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195

On Thu, Oct 20, 2022 at 07:19:23PM +0800, Tinghan Shen wrote:
> From: Jianjun Wang <jianjun.wang@...iatek.com>
> 
> In order to support mt8195 pcie node, update the yaml to support new
> properties of iommu and power-domain, and update the reset-names
> property to allow only one 'mac' name.
> 
> Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com>
> Signed-off-by: TingHan Shen <tinghan.shen@...iatek.com>
> ---
>  .../bindings/pci/mediatek-pcie-gen3.yaml         | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index c00be39af64e..af271018b134 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -70,14 +70,21 @@ properties:
>      minItems: 1
>      maxItems: 8
>  
> +  iommu-map:
> +    maxItems: 1
> +
> +  iommu-map-mask:
> +    maxItems: 1

This is not a array. It needs a value. Must be 0 if iommu-map only has 1 
entry? Or you only support 1 downstream device?

> +
>    resets:
>      minItems: 1
>      maxItems: 2
>  
>    reset-names:
> -    minItems: 1
> -    items:
> -      - const: phy
> +    oneOf:
> +      - items:
> +          - const: phy
> +          - const: mac
>        - const: mac
>  
>    clocks:
> @@ -107,6 +114,9 @@ properties:
>      items:
>        - const: pcie-phy
>  
> +  power-domains:
> +    maxItems: 1
> +
>    '#interrupt-cells':
>      const: 1
>  
> -- 
> 2.18.0
> 
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ