[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DB7PR04MB40103EFAF2842B82AD8BA38F902D9@DB7PR04MB4010.eurprd04.prod.outlook.com>
Date: Fri, 21 Oct 2022 02:35:39 +0000
From: Bough Chen <haibo.chen@....com>
To: Brian Norris <briannorris@...omium.org>,
Ulf Hansson <ulf.hansson@...aro.org>
CC: Shawn Lin <shawn.lin@...k-chips.com>,
Shawn Guo <shawnguo@...nel.org>,
Fabio Estevam <festevam@...il.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
dl-linux-imx <linux-imx@....com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Florian Fainelli <f.fainelli@...il.com>,
Michal Simek <michal.simek@...inx.com>,
Faiz Abbas <faiz_abbas@...com>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
Jonathan Hunter <jonathanh@...dia.com>,
Al Cooper <alcooperx@...il.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Sowjanya Komatineni <skomatineni@...dia.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Thierry Reding <thierry.reding@...il.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Sascha Hauer <s.hauer@...gutronix.de>
Subject: RE: [PATCH v2 4/7] mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for
CQHCI
> -----Original Message-----
> From: Brian Norris <briannorris@...omium.org>
> Sent: 2022年10月20日 5:55
> To: Ulf Hansson <ulf.hansson@...aro.org>
> Cc: Shawn Lin <shawn.lin@...k-chips.com>; Shawn Guo
> <shawnguo@...nel.org>; Fabio Estevam <festevam@...il.com>; Bough Chen
> <haibo.chen@....com>; Broadcom internal kernel review list
> <bcm-kernel-feedback-list@...adcom.com>; dl-linux-imx <linux-imx@....com>;
> Pengutronix Kernel Team <kernel@...gutronix.de>; Florian Fainelli
> <f.fainelli@...il.com>; Michal Simek <michal.simek@...inx.com>; Faiz Abbas
> <faiz_abbas@...com>; linux-mmc@...r.kernel.org; Jonathan Hunter
> <jonathanh@...dia.com>; Al Cooper <alcooperx@...il.com>;
> linux-arm-kernel@...ts.infradead.org; Sowjanya Komatineni
> <skomatineni@...dia.com>; linux-kernel@...r.kernel.org; Thierry Reding
> <thierry.reding@...il.com>; Adrian Hunter <adrian.hunter@...el.com>;
> Sascha Hauer <s.hauer@...gutronix.de>; Brian Norris
> <briannorris@...omium.org>
> Subject: [PATCH v2 4/7] mms: sdhci-esdhc-imx: Fix SDHCI_RESET_ALL for CQHCI
>
> [[ NOTE: this is completely untested by the author, but included solely
> because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
> SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
> drivers using CQHCI might benefit from a similar change, if they
> also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
> bug on at least MSM, Arasan, and Intel hardware. ]]
>
> SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
> tracking that properly in software. When out of sync, we may trigger various
> timeouts.
>
> It's not typical to perform resets while CQE is enabled, but this may occur in
> some suspend or error recovery scenarios.
>
> Fixes: bb6e358169bf ("mmc: sdhci-esdhc-imx: add CMDQ support")
> Signed-off-by: Brian Norris <briannorris@...omium.org>
Reviewed-by: Haibo Chen <haibo.chen@....com>
> ---
>
> Changes in v2:
> - Drop unnecessary ESDHC_FLAG_CQHCI check
>
> drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
> b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 55981b0f0b10..c07df7b71b22 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -1288,6 +1288,9 @@ static void esdhc_set_uhs_signaling(struct sdhci_host
> *host, unsigned timing)
>
> static void esdhc_reset(struct sdhci_host *host, u8 mask) {
> + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask &
> SDHCI_RESET_ALL))
> + cqhci_deactivate(host->mmc);
> +
> sdhci_reset(host, mask);
>
> sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
> --
> 2.38.0.413.g74048e4d9e-goog
Powered by blists - more mailing lists