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Message-ID: <de66f0e3-7694-7315-c896-9211259a1a17@collabora.com>
Date: Fri, 21 Oct 2022 10:41:20 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Trevor Wu <trevor.wu@...iatek.com>, broonie@...nel.org,
tiwai@...e.com, robh+dt@...nel.org, matthias.bgg@...il.com,
p.zabel@...gutronix.de
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
alsa-devel@...a-project.org, linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v2 03/12] ASoC: mediatek: mt8188: support audsys clock
Il 21/10/22 10:27, Trevor Wu ha scritto:
> Add mt8188 audio cg clock control. Audio clock gates are registered to CCF
> for reference count and clock parent management.
>
> Signed-off-by: Trevor Wu <trevor.wu@...iatek.com>
> ---
> sound/soc/mediatek/mt8188/mt8188-audsys-clk.c | 206 ++++++++++++++++++
> sound/soc/mediatek/mt8188/mt8188-audsys-clk.h | 15 ++
> .../soc/mediatek/mt8188/mt8188-audsys-clkid.h | 83 +++++++
> 3 files changed, 304 insertions(+)
> create mode 100644 sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
> create mode 100644 sound/soc/mediatek/mt8188/mt8188-audsys-clk.h
> create mode 100644 sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h
>
> diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
> new file mode 100644
> index 000000000000..1f294231d4c2
> --- /dev/null
> +++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
> @@ -0,0 +1,206 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * mt8188-audsys-clk.c -- MediaTek 8188 audsys clock control
> + *
> + * Copyright (c) 2022 MediaTek Inc.
> + * Author: Chun-Chia Chiu <chun-chia.chiu@...iatek.com>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include "mt8188-afe-common.h"
> +#include "mt8188-audsys-clk.h"
> +#include "mt8188-audsys-clkid.h"
> +#include "mt8188-reg.h"
> +
> +struct afe_gate {
> + int id;
> + const char *name;
> + const char *parent_name;
> + int reg;
> + u8 bit;
> + const struct clk_ops *ops;
> + unsigned long flags;
> + u8 cg_flags;
> +};
> +
> +#define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\
> + .id = _id, \
> + .name = _name, \
> + .parent_name = _parent, \
> + .reg = _reg, \
> + .bit = _bit, \
> + .flags = _flags, \
> + .cg_flags = _cgflags, \
> + }
> +
> +#define GATE_AFE(_id, _name, _parent, _reg, _bit) \
> + GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
> + CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, CLK_GATE_SET_TO_DISABLE)
Can you please explain what's the reason for CLK_IGNORE_UNUSED here?
Maybe we can solve some issue that you're facing in a cleaner way.
Regards,
Angelo
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