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Message-Id: <20221021095833.62406-5-vivek.2311@samsung.com>
Date:   Fri, 21 Oct 2022 15:28:30 +0530
From:   Vivek Yadav <vivek.2311@...sung.com>
To:     rcsekar@...sung.com, wg@...ndegger.com, mkl@...gutronix.de,
        davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
        pabeni@...hat.com, pankaj.dubey@...sung.com,
        ravi.patel@...sung.com, alim.akhtar@...sung.com
Cc:     linux-can@...r.kernel.org, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, Vivek Yadav <vivek.2311@...sung.com>
Subject: [PATCH 4/7] can: mcan: enable peripheral clk to access mram

When we try to access the mcan message ram addresses, make sure hclk is
not gated by any other drivers or disabled. Enable the clock (hclk) before
accessing the mram and disable it after that.

This is required in case if by-default hclk is gated.

Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
Signed-off-by: Vivek Yadav <vivek.2311@...sung.com>
---
 drivers/net/can/m_can/m_can_platform.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c
index eee47bad0592..5aab025775f9 100644
--- a/drivers/net/can/m_can/m_can_platform.c
+++ b/drivers/net/can/m_can/m_can_platform.c
@@ -140,10 +140,17 @@ static int m_can_plat_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, mcan_class);
 
-	ret = m_can_init_ram(mcan_class);
+	/* clock needs to be enabled to access mram block */
+	ret = clk_prepare_enable(mcan_class->hclk);
 	if (ret)
 		goto probe_fail;
 
+	ret = m_can_init_ram(mcan_class);
+	if (ret)
+		goto mram_fail;
+
+	clk_disable_unprepare(mcan_class->hclk);
+
 	pm_runtime_enable(mcan_class->dev);
 	ret = m_can_class_register(mcan_class);
 	if (ret)
@@ -153,6 +160,8 @@ static int m_can_plat_probe(struct platform_device *pdev)
 
 out_runtime_disable:
 	pm_runtime_disable(mcan_class->dev);
+mram_fail:
+	clk_disable_unprepare(mcan_class->hclk);
 probe_fail:
 	m_can_class_free_dev(mcan_class->net);
 	return ret;
-- 
2.17.1

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