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Message-Id: <20221001-iommu-support-v5-3-92cdbb83bbb8@baylibre.com>
Date: Fri, 21 Oct 2022 15:42:18 +0200
From: Alexandre Mergnat <amergnat@...libre.com>
To: Robin Murphy <robin.murphy@....com>,
Joerg Roedel <joro@...tes.org>, Yong Wu <yong.wu@...iatek.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Will Deacon <will@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: Alexandre Mergnat <amergnat@...libre.com>,
linux-kernel@...r.kernel.org,
Amjad Ouled-Ameur <aouledameur@...libre.com>,
devicetree@...r.kernel.org, Fabien Parent <fparent@...libre.com>,
linux-arm-kernel@...ts.infradead.org,
Markus Schneider-Pargmann <msp@...libre.com>,
linux-mediatek@...ts.infradead.org, iommu@...ts.linux.dev,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v5 3/3] iommu/mediatek: add support for MT8365 SoC
From: Fabien Parent <fparent@...libre.com>
Add IOMMU support for MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@...libre.com>
Reviewed-by: Amjad Ouled-Ameur <aouledameur@...libre.com>
Tested-by: Amjad Ouled-Ameur <aouledameur@...libre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>
---
drivers/iommu/mtk_iommu.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 563e3c54a0e2..aff7a9190749 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -170,6 +170,7 @@ enum mtk_iommu_plat {
M4U_MT8186,
M4U_MT8192,
M4U_MT8195,
+ M4U_MT8365,
};
struct mtk_iommu_iova_region {
@@ -1525,6 +1526,17 @@ static const struct mtk_iommu_plat_data mt8195_data_vpp = {
{4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
};
+static const struct mtk_iommu_plat_data mt8365_data = {
+ .m4u_plat = M4U_MT8365,
+ .flags = RESET_AXI | INT_ID_PORT_WIDTH_6,
+ .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
+ .banks_num = 1,
+ .banks_enable = {true},
+ .iova_region = single_domain,
+ .iova_region_nr = ARRAY_SIZE(single_domain),
+ .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}}, /* Linear mapping. */
+};
+
static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1537,6 +1549,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
{ .compatible = "mediatek,mt8195-iommu-vdo", .data = &mt8195_data_vdo},
{ .compatible = "mediatek,mt8195-iommu-vpp", .data = &mt8195_data_vpp},
+ { .compatible = "mediatek,mt8365-m4u", .data = &mt8365_data},
{}
};
--
b4 0.10.1
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