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Message-ID: <a46c6a18-903d-2120-4876-509ce8ad19d5@linaro.org>
Date: Sat, 22 Oct 2022 12:18:49 -0400
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Vadym Kochan <vadym.kochan@...ision.eu>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: Elad Nachman <enachman@...vell.com>
Subject: Re: [PATCH 1/2] dt-bindings: mtd: marvell-nand: Convert to YAML DT
scheme
On 21/10/2022 15:45, Vadym Kochan wrote:
> Switch the DT binding to a YAML schema to enable the DT validation.
>
> Dropped deprecated compatibles and properties described in txt file.
>
> Signed-off-by: Vadym Kochan <vadym.kochan@...ision.eu>
> ---
> .../bindings/mtd/marvell,nand-controller.yaml | 199 ++++++++++++++++++
> .../devicetree/bindings/mtd/marvell-nand.txt | 126 -----------
> 2 files changed, 199 insertions(+), 126 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> delete mode 100644 Documentation/devicetree/bindings/mtd/marvell-nand.txt
>
> diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> new file mode 100644
> index 000000000000..535b7f8903c8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml
> @@ -0,0 +1,199 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell NAND Flash Controller (NFC)
> +
> +maintainers:
> + - Miquel Raynal <miquel.raynal@...tlin.com>
This should be someone responsible for hardware, not subsystem
maintainer. Unless by coincidence Miquel matches both. :)
> +
> +properties:
> +
> + compatible:
> + oneOf:
> + - items:
> + - const: marvell,armada-8k-nand-controller
> + - const: marvell,armada370-nand-controller
Does not look like you tested the bindings. Please run `make
dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
> + - const: marvell,armada370-nand-controller
> + - const: marvell,pxa3xx-nand-controller
These two are just enum.
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
Drop, comes with nand-controller.yaml
> +
> + "#size-cells":
> + const: 0
Ditto
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> + description: |
No need for |
> + Shall reference the NAND controller clocks, the second one is
> + is only needed for the Armada 7K/8K SoCs
You need allOf:if:then restricting it further per variant.
> +
> + clock-names:
> + items:
> + - const: core
> + - const: reg
> + description: |
> + Mandatory if there is a second clock, in this case there
> + should be one clock named "core" and another one named "reg"
The message is confusing. What is mandatory if there is a second clock?
Plus, the binding requires two clocks.
Drop entire description.
minItems: 1
> +
> + dmas:
> + maxItems: 1
> + description: rxtx DMA channel
Drop description.
> +
> + dma-names:
> + items:
> + - const: rxtx
> +
> + marvell,system-controller:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Syscon node that handles NAND controller related registers
> +
> +patternProperties:
> + "^nand@[0-3]$":
> + type: object
> + properties:
> +
Drop blank line.
> + reg:
> + minimum: 0
> + maximum: 3
> +
> + nand-rb:
> + minimum: 0
> + maximum: 1
> +
> + nand-ecc-strength:
> + enum: [1, 4, 8]
> +
> + nand-on-flash-bbt: true
> +
> + nand-ecc-mode: true
> +
> + nand-ecc-algo:
> + description: |
> + This property is essentially useful when not using hardware ECC.
> + Howerver, it may be added when using hardware ECC for clarification
> + but will be ignored by the driver because ECC mode is chosen depending
> + on the page size and the strength required by the NAND chip.
> + This value may be overwritten with nand-ecc-strength property.
> +
> + nand-ecc-step-size:
> + const: 512
Why this is const?
> + description: |
> + Marvell's NAND flash controller does use fixed strength
> + (1-bit for Hamming, 16-bit for BCH), so the actual step size
> + will shrink or grow in order to fit the required strength.
> + Step sizes are not completely random for all and follow certain
> + patterns described in AN-379, "Marvell SoC NFC ECC".
> +
> + label:
> + $ref: /schemas/types.yaml#/definitions/string
> +
> + partitions:
> + type: object
> + $ref: "/schemas/mtd/partitions/partition.yaml"
Drop quotes
unevalautedProperties: false
and then you will see errors, because you referenced schema for one
partition.
> +
> + marvell,nand-keep-config:
> + description: |
> + Orders the driver not to take the timings from the core and
> + leaving them completely untouched. Bootloader timings will then
> + be used.
> + $ref: /schemas/types.yaml#/definitions/flag
> +
> + marvell,nand-enable-arbiter:
> + description: |
> + To enable the arbiter, all boards blindly used it,
> + this bit was set by the bootloader for many boards and even if
> + it is marked reserved in several datasheets, it might be needed to set
> + it (otherwise it is harmless) so whether or not this property is set,
> + the bit is selected by the driver.
> + $ref: /schemas/types.yaml#/definitions/flag
> + deprecated: true
> +
> + additionalProperties: false
> +
> + required:
> + - reg
> + - nand-rb
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - "#address-cells"
> + - "#size-cells"
Drop these two - required by nand-controller.
> + - interrupts
> + - clocks
> +
> +allOf:
> + - $ref: "nand-controller.yaml#"
Drop quotes.
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: marvell,pxa3xx-nand-controller
> + then:
> + required:
> + - dmas
> + - dma-names
> + else:
> + properties:
> + dmas: false
> + dma-names: false
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: marvell,armada-8k-nand-controller
> + then:
> + required:
> + - marvell,system-controller
> + else:
> + properties:
> + marvell,system-controller: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + nand_controller: nand-controller@...00 {
> + compatible = "marvell,armada370-nand-controller";
> + reg = <0xd0000 0x54>;
Use 4 spaces for example indentation.
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&coredivclk 0>;
> +
Best regards,
Krzysztof
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