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Date:   Mon, 24 Oct 2022 09:30:09 +0200
From:   "Arnd Bergmann" <arnd@...db.de>
To:     "Linus Torvalds" <torvalds@...ux-foundation.org>,
        "Maciej W. Rozycki" <macro@...am.me.uk>
Cc:     "Matthew Wilcox" <willy@...radead.org>,
        "Peter Zijlstra" <peterz@...radead.org>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        "Yu Zhao" <yuzhao@...gle.com>,
        "Andrew Morton" <akpm@...ux-foundation.org>,
        "Andi Kleen" <ak@...ux.intel.com>,
        "Aneesh Kumar" <aneesh.kumar@...ux.ibm.com>,
        "Catalin Marinas" <catalin.marinas@....com>,
        "Dave Hansen" <dave.hansen@...ux.intel.com>,
        "Hillf Danton" <hdanton@...a.com>, "Jens Axboe" <axboe@...nel.dk>,
        "Johannes Weiner" <hannes@...xchg.org>,
        "Jonathan Corbet" <corbet@....net>, "Mel Gorman" <mgorman@...e.de>,
        "Michael Larabel" <Michael@...haellarabel.com>,
        "Michal Hocko" <mhocko@...nel.org>,
        "Mike Rapoport" <rppt@...nel.org>, "Tejun Heo" <tj@...nel.org>,
        "Vlastimil Babka" <vbabka@...e.cz>,
        "Will Deacon" <will@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mm@...ck.org,
        page-reclaim@...gle.com, "Brian Geffon" <bgeffon@...gle.com>,
        "Jan Alexander Steffens" <heftig@...hlinux.org>,
        "Oleksandr Natalenko" <oleksandr@...alenko.name>,
        "Steven Barrett" <steven@...uorix.net>,
        "Suleiman Souhlal" <suleiman@...gle.com>,
        "Daniel Byrne" <djbyrne@....edu>,
        "Donald Carr" <d@...os-reins.com>,
        Holger Hoffstätte <holger@...lied-asynchrony.com>,
        "Konstantin Kharlamov" <Hi-Angel@...dex.ru>,
        "Shuang Zhai" <szhai2@...rochester.edu>,
        "Sofia Trinh" <sofia.trinh@....works>,
        "Vaibhav Jain" <vaibhav@...ux.ibm.com>
Subject: Re: [PATCH v14 08/14] mm: multi-gen LRU: support page table walks

On Sun, Oct 23, 2022, at 20:35, Linus Torvalds wrote:
>
> Honestly, I wouldn't mind upgrading the minimum requirements to at
> least M586TSC - leaving some of those early "fake Pentium" clones
> behind too. Because 'rdtsc' is probably an even worse issue than
> CMPXCHG8B.

Kconfig treats X86_CMPXCHG64 as a strict subset of X86_TSC (except
when enabling X86_PAE, which relies on cx8), so requiring both
sounds like a good idea.

>From the Kconfig history, I see you initially only enabled
cx8 unconditionally for a couple of CPUs in 982d007a6eec ("x86:
Optimize cmpxchg64() at build-time some more"), and Matthew
Whitehead extended that list in f960cfd12650 ("x86/Kconfig:
Add missing i586-class CPUs to the X86_CMPXCHG64 Kconfig group").

There are still a handful of CPUs that according to [1] 
claim cx8 support that we leave disabled, specifically the
Kconfig symbols for MWINCHIP3D, MCRUSOE, MEFFICEON, MCYRIXIII,
MVIAC3_2 and MVIAC7 should have both tsc and cx8, while the
older MWINCHIPC6 and a small subset of M586 (Cyrix 6x86mx, C-II
and AMD K5) apparently have cx8 but not tsc.

Would you drop support for the 686-class chips that currently
don't use cmpxchg8b, or just remove CONFIG_X86_CMPXCHG64 and
assume they work after all?

       Arnd

[1] https://reactos.org/wiki/Supported_Hardware/CPU

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