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Message-ID: <166663927468.2069331.7937155894835281223.robh@kernel.org>
Date: Mon, 24 Oct 2022 14:21:15 -0500
From: Rob Herring <robh@...nel.org>
To: Frank Wunderlich <linux@...web.de>
Cc: Jianjun Wang <jianjun.wang@...iatek.com>,
linux-kernel@...r.kernel.org, Steven Liu <steven.liu@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-arm-kernel@...ts.infradead.org,
Sam Shih <Sam.Shih@...iatek.com>,
linux-mediatek@...ts.infradead.org,
Bjorn Helgaas <bhelgaas@...gle.com>,
Frank Wunderlich <frank-w@...lic-files.de>,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
Ryder Lee <ryder.lee@...iatek.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock
config
On Sun, 23 Oct 2022 19:02:32 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> The PCIe driver covers different SOC which needing different clock
> configs. Define them based on compatible.
>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++-----
> 1 file changed, 36 insertions(+), 12 deletions(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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