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Message-ID: <SJ1PR11MB608390D539CD4B405A195344FC2E9@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Mon, 24 Oct 2022 21:08:54 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: Borislav Petkov <bp@...en8.de>
CC: Yazen Ghannam <yazen.ghannam@....com>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>,
"Smita.KoralahalliChannabasappa@....com"
<Smita.KoralahalliChannabasappa@....com>
Subject: RE: [PATCH 1/3] x86/MCE, EDAC/mce_amd: Add support for new
MCA_SYND{1,2} registers
We already have:
__u8 cpuvendor; /* Kernel's X86_VENDOR enum */
So the mce structure contains which vendor created it.
> I guess a u8 vendor_info[VENDOR_INFO_SIZE] or so which we can extend
> later if needed.
Extending is hard because we already boxed in the two AMD specific fields
with some generic fields that follow (ppin & microcode).
But we could change the current form to be something like:
union {
struct vendor_info {
__u64 vendor_info[2];
};
struct vendor_amd_info {
__u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */
__u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */
};
};
to make it clear that these 16 bytes are up for grabs to be re-interpreted based on
the value of "cpuvendor" (and possibly also "cpuid" if a vendor wants different data
logged for different models).
-Tony
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