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Message-ID: <CADnq5_MPPuvMxpJ7Tz27jC9g7_Z2=C_Ejy13Xx8pk8mOsSKHxA@mail.gmail.com>
Date: Tue, 25 Oct 2022 10:33:00 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Harry Wentland <harry.wentland@....com>,
Daniel Vetter <daniel@...ll.ch>,
Dave Airlie <airlied@...il.com>
Cc: Hamza Mahfooz <hamza.mahfooz@....com>,
linux-kernel@...r.kernel.org, Ian Chen <ian.chen@....com>,
David Airlie <airlied@...ux.ie>,
dri-devel@...ts.freedesktop.org,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
amd-gfx@...ts.freedesktop.org, Fangzhi Zuo <Jerry.Zuo@....com>,
Aurabindo Pillai <aurabindo.pillai@....com>,
Leo Li <sunpeng.li@....com>, hersen wu <hersenxs.wu@....com>,
Bhawanpreet Lakha <Bhawanpreet.Lakha@....com>,
"Pan, Xinhui" <Xinhui.Pan@....com>, Roman Li <roman.li@....com>,
Christian König <christian.koenig@....com>,
Claudio Suarez <cssk@...-c.es>,
Thomas Zimmermann <tzimmermann@...e.de>,
Wayne Lin <Wayne.Lin@....com>,
Alex Deucher <alexander.deucher@....com>,
Colin Ian King <colin.king@...el.com>,
Nicholas Kazlauskas <nicholas.kazlauskas@....com>
Subject: Re: [PATCH 3/3] Revert "drm/amd/display: Limit max DSC target bpp for
specific monitors"
@Daniel Vetter
, @Dave Airlie
Any objections taking this through the AMD tree or would you rather it
landed via drm-misc?
Thanks,
Alex
On Tue, Oct 25, 2022 at 10:21 AM Harry Wentland <harry.wentland@....com> wrote:
>
> Series is
>
> Reviewed-by: Harry Wentland <harry.wentland@....com>
>
> Harry
>
> On 2022-10-24 15:22, Hamza Mahfooz wrote:
> > This reverts commit 55eea8ef98641f6e1e1c202bd3a49a57c1dd4059.
> >
> > This quirk is now handled in the DRM core, so we can drop all of
> > the internal code that was added to handle it.
> >
> > Signed-off-by: Hamza Mahfooz <hamza.mahfooz@....com>
> > ---
> > .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 35 -------------------
> > 1 file changed, 35 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > index 4956a0118215..a21e2ba77ddb 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> > @@ -41,39 +41,6 @@
> > #include "dm_helpers.h"
> > #include "ddc_service_types.h"
> >
> > -struct monitor_patch_info {
> > - unsigned int manufacturer_id;
> > - unsigned int product_id;
> > - void (*patch_func)(struct dc_edid_caps *edid_caps, unsigned int param);
> > - unsigned int patch_param;
> > -};
> > -static void set_max_dsc_bpp_limit(struct dc_edid_caps *edid_caps, unsigned int param);
> > -
> > -static const struct monitor_patch_info monitor_patch_table[] = {
> > -{0x6D1E, 0x5BBF, set_max_dsc_bpp_limit, 15},
> > -{0x6D1E, 0x5B9A, set_max_dsc_bpp_limit, 15},
> > -};
> > -
> > -static void set_max_dsc_bpp_limit(struct dc_edid_caps *edid_caps, unsigned int param)
> > -{
> > - if (edid_caps)
> > - edid_caps->panel_patch.max_dsc_target_bpp_limit = param;
> > -}
> > -
> > -static int amdgpu_dm_patch_edid_caps(struct dc_edid_caps *edid_caps)
> > -{
> > - int i, ret = 0;
> > -
> > - for (i = 0; i < ARRAY_SIZE(monitor_patch_table); i++)
> > - if ((edid_caps->manufacturer_id == monitor_patch_table[i].manufacturer_id)
> > - && (edid_caps->product_id == monitor_patch_table[i].product_id)) {
> > - monitor_patch_table[i].patch_func(edid_caps, monitor_patch_table[i].patch_param);
> > - ret++;
> > - }
> > -
> > - return ret;
> > -}
> > -
> > /* dm_helpers_parse_edid_caps
> > *
> > * Parse edid caps
> > @@ -148,8 +115,6 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
> > kfree(sads);
> > kfree(sadb);
> >
> > - amdgpu_dm_patch_edid_caps(edid_caps);
> > -
> > return result;
> > }
> >
>
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