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Message-ID: <CADnq5_OuVWTmgRZsyF50VdJg0AfSS7_3cN2UCWrBDayXcPUkSQ@mail.gmail.com>
Date: Tue, 25 Oct 2022 10:43:01 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Jason Gunthorpe <jgg@...dia.com>
Cc: Dave Airlie <airlied@...il.com>,
Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>,
Jiho Chu <jiho.chu@...sung.com>,
Jeffrey Hugo <quic_jhugo@...cinc.com>,
Thomas Zimmermann <tzimmermann@...e.de>,
Arnd Bergmann <arnd@...db.de>,
John Hubbard <jhubbard@...dia.com>,
Oded Gabbay <ogabbay@...nel.org>, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
Christoph Hellwig <hch@...radead.org>,
Jacek Lawrynowicz <jacek.lawrynowicz@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Alex Deucher <alexander.deucher@....com>,
Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>,
Kevin Hilman <khilman@...libre.com>,
Maciej Kwapulinski <maciej.kwapulinski@...ux.intel.com>,
Jagan Teki <jagan@...rulasolutions.com>
Subject: Re: [RFC PATCH 0/3] new subsystem for compute accelerator devices
On Tue, Oct 25, 2022 at 10:34 AM Jason Gunthorpe <jgg@...dia.com> wrote:
>
> On Tue, Oct 25, 2022 at 10:21:34AM -0400, Alex Deucher wrote:
>
> > E.g., the kfd node provides platform level compute
> > topology information; e.g., the NUMA details for connected GPUs and
> > CPUs, non-GPU compute node information, cache level topologies, etc.
>
> See, this is exactly what I'm talking about. What on earth does any of
> this have to do with DRM?
At least for the GPU information it seems relevant. What value are
acceleration device cache topologies outside of the subsytsem that
uses them?
>
> We alread have places in the kernel that own and expose these kinds of
> information, drivers need to use them. Not re-invent them.
I don't disagree, but I'm not sure where the best place for these
should be. Probably a lack of knowledge of where this should actually
live and indifference from the maintainers of those areas since this
use case doesn't match existing ones.
Alex
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