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Message-Id: <20221026124150.v4.3.I6a715feab6d01f760455865e968ecf0d85036018@changeid>
Date: Wed, 26 Oct 2022 12:42:05 -0700
From: Brian Norris <briannorris@...omium.org>
To: Ulf Hansson <ulf.hansson@...aro.org>
Cc: Shawn Guo <shawnguo@...nel.org>, linux-mmc@...r.kernel.org,
Adrian Hunter <adrian.hunter@...el.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
Michal Simek <michal.simek@...inx.com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Bjorn Andersson <andersson@...nel.org>,
Thierry Reding <thierry.reding@...il.com>,
linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Andy Gross <agross@...nel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Al Cooper <alcooperx@...il.com>,
Fabio Estevam <festevam@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
NXP Linux Team <linux-imx@....com>,
Haibo Chen <haibo.chen@....com>,
Sowjanya Komatineni <skomatineni@...dia.com>,
Brian Norris <briannorris@...omium.org>
Subject: [PATCH v4 3/7] mmc: sdhci-brcmstb: Fix SDHCI_RESET_ALL for CQHCI
[[ NOTE: this is completely untested by the author, but included solely
because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix
SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
drivers using CQHCI might benefit from a similar change, if they
also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
bug on at least MSM, Arasan, and Intel hardware. ]]
SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.
It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.
Include this fix by way of the new sdhci_and_cqhci_reset() helper.
I only patch the bcm7216 variant even though others potentially *could*
provide the 'supports-cqe' property (and thus enable CQHCI), because
d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing
(CQE)") and some Broadcom folks confirm that only the 7216 variant
actually supports it.
This patch depends on (and should not compile without) the patch
entitled "mmc: cqhci: Provide helper for resetting both SDHCI and
CQHCI".
Fixes: d46ba2d17f90 ("mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)")
Signed-off-by: Brian Norris <briannorris@...omium.org>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
---
Changes in v4:
- Improve commit notes
- Add Adrian's Ack
- Add Florian's Reviewed-by
Changes in v3:
- Use new SDHCI+CQHCI helper
Changes in v2:
- Rely on cqhci_deactivate() to handle NULL cqe_private, instead of
moving around CQE capability flags
drivers/mmc/host/sdhci-brcmstb.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index aff36a933ebe..55d8bd232695 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -12,6 +12,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
+#include "sdhci-cqhci.h"
#include "sdhci-pltfm.h"
#include "cqhci.h"
@@ -55,7 +56,7 @@ static void brcmstb_reset(struct sdhci_host *host, u8 mask)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
- sdhci_reset(host, mask);
+ sdhci_and_cqhci_reset(host, mask);
/* Reset will clear this, so re-enable it */
if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)
--
2.38.0.135.g90850a2211-goog
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