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Message-Id: <20221026194345.243007-1-aidanmacdonald.0x0@gmail.com>
Date: Wed, 26 Oct 2022 20:43:39 +0100
From: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
To: paul@...pouillou.net, mturquette@...libre.com, sboyd@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org
Cc: zhouyu@...yeetech.com, linux-mips@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 0/6] Add support for X1000 audio clocks
The first three patches of this series modify the Ingenic CGU driver to
allow the X1000's I2S divider to be modeled as a PLL clock. This is not
really true -- it's just a fractional divider -- but doing it this way
maximizes code reuse and avoids the need for a custom clock. (Thanks to
Zhou Yanjie & Paul Cercueil for the idea.)
Patches 04-05 actually add the X1000 SoC's audio clocks. The last patch
is just a cosmetic cleanup, feel free to take it or leave it.
Aidan MacDonald (6):
clk: ingenic: Make PLL clock "od" field optional
clk: ingenic: Make PLL clock enable_bit and stable_bit optional
clk: ingenic: Add .set_rate_hook() for PLL clocks
dt-bindings: ingenic,x1000-cgu: Add audio clocks
clk: ingenic: Add X1000 audio clocks
clk: ingenic: Minor cosmetic fixups for X1000
drivers/clk/ingenic/cgu.c | 38 ++++--
drivers/clk/ingenic/cgu.h | 17 ++-
drivers/clk/ingenic/x1000-cgu.c | 119 ++++++++++++++----
include/dt-bindings/clock/ingenic,x1000-cgu.h | 4 +
4 files changed, 141 insertions(+), 37 deletions(-)
--
2.38.1
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