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Message-ID: <20221026204315.GA1161577-robh@kernel.org>
Date: Wed, 26 Oct 2022 15:43:15 -0500
From: Rob Herring <robh@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, krzysztof.kozlowski@...aro.org,
krzysztof.kozlowski+dt@...aro.org, linux@...linux.org.uk,
vladimir.oltean@....com, vigneshr@...com, nsekhar@...com,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update
bindings for J721e CPSW9G
On Wed, Oct 26, 2022 at 02:39:55PM +0530, Siddharth Vadapalli wrote:
> Update bindings for TI K3 J721e SoC which contains 9 ports (8 external
> ports) CPSW9G module and add compatible for it.
Don't repeat 'bindings' in the subject, space is precious:
dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J721e CPSW9G support
Otherwise,
Reviewed-by: Rob Herring <robh@...nel.org>
>
> Changes made:
> - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G.
> - Extend pattern properties for new compatible.
> - Change maximum number of CPSW ports to 8 for new compatible.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> ---
> .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 33 ++++++++++++++++---
> 1 file changed, 29 insertions(+), 4 deletions(-)
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