linux-kernel - Re: [PATCH v3 05/17] timer: Rework idle logic

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20221026132722.GC1327339@lothringen>
Date:   Wed, 26 Oct 2022 15:27:22 +0200
From:   Frederic Weisbecker <frederic@...nel.org>
To:     Anna-Maria Behnsen <anna-maria@...utronix.de>
Cc:     linux-kernel@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        John Stultz <john.stultz@...aro.org>,
        Eric Dumazet <edumazet@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        linux-pm@...r.kernel.org, Arjan van de Ven <arjan@...radead.org>,
        "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
        Frederic Weisbecker <fweisbec@...il.com>,
        Rik van Riel <riel@...hat.com>
Subject: Re: [PATCH v3 05/17] timer: Rework idle logic

On Tue, Oct 25, 2022 at 03:58:38PM +0200, Anna-Maria Behnsen wrote:
> From: Thomas Gleixner <tglx@...utronix.de>
> 
> To improve readability of the code, split base->idle calculation and
> expires calculation into separate parts.
> 
> Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> Signed-off-by: Anna-Maria Behnsen <anna-maria@...utronix.de>
> ---
>  kernel/time/timer.c | 29 ++++++++++++++---------------
>  1 file changed, 14 insertions(+), 15 deletions(-)
> 
> diff --git a/kernel/time/timer.c b/kernel/time/timer.c
> index f34bc75ff848..cb4194ecca60 100644
> --- a/kernel/time/timer.c
> +++ b/kernel/time/timer.c
> @@ -1727,21 +1727,20 @@ u64 get_next_timer_interrupt(unsigned long basej, u64 basem)
>  			base->clk = nextevt;
>  	}
>  
> -	if (time_before_eq(nextevt, basej)) {
> -		expires = basem;
> -		base->is_idle = false;
> -	} else {
> -		if (base->timers_pending)
> -			expires = basem + (u64)(nextevt - basej) * TICK_NSEC;
> -		/*
> -		 * If we expect to sleep more than a tick, mark the base idle.
> -		 * Also the tick is stopped so any added timer must forward
> -		 * the base clk itself to keep granularity small. This idle
> -		 * logic is only maintained for the BASE_STD base, deferrable
> -		 * timers may still see large granularity skew (by design).
> -		 */
> -		if ((expires - basem) > TICK_NSEC)
> -			base->is_idle = true;
> +	/*
> +	 * Base is idle if the next event is more than a tick away. Also
> +	 * the tick is stopped so any added timer must forward the base clk
> +	 * itself to keep granularity small. This idle logic is only
> +	 * maintained for the BASE_STD base, deferrable timers may still
> +	 * see large granularity skew (by design).
> +	 */
> +	base->is_idle = time_after(nextevt, basej + 1);

A subtle change, yet welcome, is introduced here. If the next event is just
one jiffy ahead, base->is_idle used to be left untouched. So the behaviour
was:

1) If the tick was already stopped (so we must be after an idle IRQ),
   base->is_idle remains true
2) If the tick was not yet stopped, base->is_idle remains false

After this patch, 1) becomes:

1) If the tick was already stopped, turn base->is_idle to false

As a result, we may spare an IPI if we remotely enqueue a timer to
an idle CPU that is going to tick on the next jiffy.

Whether it's worth mentioning in the changelog, I leave it to you.

> +
> +	if (base->timers_pending) {
> +		/* If we missed a tick already, force 0 delta */
> +		if (time_before_eq(nextevt, basej))
> +			nextevt = basej;

Can be time_before() then, right?

Reviewed-by: Frederic Weisbecker <frederic@...nel.org>


> +		expires = basem + (u64)(nextevt - basej) * TICK_NSEC;
>  	}
>  	raw_spin_unlock(&base->lock);
>  
> -- 
> 2.30.2
>