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Message-Id: <20221027185934.EE6D5C433C1@smtp.kernel.org>
Date: Thu, 27 Oct 2022 11:59:32 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Aidan MacDonald <aidanmacdonald.0x0@...il.com>,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
paul@...pouillou.net, robh+dt@...nel.org
Cc: zhouyu@...yeetech.com, linux-mips@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/6] clk: ingenic: Add .set_rate_hook() for PLL clocks
Quoting Aidan MacDonald (2022-10-26 12:43:42)
> The set rate hook is called immediately after updating the clock
> register but before the spinlock is released. This allows another
> register to be updated alongside the main one, which is needed to
> handle the I2S divider on some SoCs.
>
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---
Applied to clk-next
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