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Date: Thu, 27 Oct 2022 14:39:32 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Dinh Nguyen <dinguyen@...nel.org>, jh80.chung@...sung.com
Cc: dinguyen@...nel.org, ulf.hansson@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCHv6 5/6] clk: socfpga: remove the setting of clk-phase for sdmmc_clk
Quoting Dinh Nguyen (2022-10-26 07:16:30)
> Now that the SDMMC driver supports setting the clk-phase, we can remove
> the need to do it in the clock driver.
>
> Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
> ---
Do you want to take this through mmc tree?
Acked-by: Stephen Boyd <sboyd@...nel.org>
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