linux-kernel - Re: [PATCH v2 2/4] ASoC: dt-bindings: realtek, rt5682s: Add AVDD and MICVDD supplies

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20221027143627.nbbketezqunkclxh@notapiano>
Date:   Thu, 27 Oct 2022 10:36:27 -0400
From:   Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Brown <broonie@...nel.org>, devicetree@...r.kernel.org,
        alsa-devel@...a-project.org, Liam Girdwood <lgirdwood@...il.com>,
        linux-kernel@...r.kernel.org, Derek Fang <derek.fang@...ltek.com>,
        kernel@...labora.com,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Subject: Re: [PATCH v2 2/4] ASoC: dt-bindings: realtek, rt5682s: Add AVDD and
 MICVDD supplies

On Tue, Oct 25, 2022 at 01:12:49PM -0700, Chen-Yu Tsai wrote:
> On Mon, Oct 24, 2022 at 3:01 PM Nícolas F. R. A. Prado
> <nfraprado@...labora.com> wrote:
> >
> > The rt5682s codec can have two supplies: AVDD and MICVDD. They are
> 
> The actual chip also has LDO1_IN (for digital core and charge pump)
> and DBVDD (for I/O). However in the Chromebook designs these two
> and AVDD are all provided from the same power rail, through separate
> filter banks.

What about rt5682 (no s), does that chip also have these same supplies?

Also, since you already gave the purpose of these other supplies, could you also
tell the purpose of AVDD, MICVDD and (for rt5682) VBAT? That way I could add
some description for them in the binding.

Thanks,
Nícolas

> 
> Neither does the datasheet specify the ordering of AVDD, DBVDD, and
> LDO1_IN for power sequencing, just that three should be toggled together.
> 
> Should we model these? Or wait until some design actually splits these?
[..]