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Message-ID: <20221028034155.5580-3-quic_bjorande@quicinc.com>
Date: Thu, 27 Oct 2022 20:41:47 -0700
From: Bjorn Andersson <quic_bjorande@...cinc.com>
To: Georgi Djakov <djakov@...nel.org>,
Sibi Sankar <quic_sibis@...cinc.com>
CC: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
"Rob Herring" <robh+dt@...nel.org>,
Mike Tipton <quic_mdtipton@...cinc.com>,
"Johan Hovold" <johan+linaro@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 02/10] interconnect: qcom: osm-l3: Squash common descriptors
Each platform defines their own OSM L3 descriptor, but in practice
there's only two: one for OSM and one for EPSS. Remove the duplicated
definitions.
Signed-off-by: Bjorn Andersson <quic_bjorande@...cinc.com>
---
drivers/interconnect/qcom/osm-l3.c | 48 +++++-------------------------
1 file changed, 8 insertions(+), 40 deletions(-)
diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index d23769844419..7d6844253241 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -104,7 +104,7 @@ static const struct qcom_osm_l3_node * const epss_l3_nodes[] = {
[SLAVE_EPSS_L3_SHARED] = &epss_l3_slave,
};
-static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = {
+static const struct qcom_osm_l3_desc osm_l3 = {
.nodes = osm_l3_nodes,
.num_nodes = ARRAY_SIZE(osm_l3_nodes),
.lut_row_size = OSM_LUT_ROW_SIZE,
@@ -112,39 +112,7 @@ static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = {
.reg_perf_state = OSM_REG_PERF_STATE,
};
-static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = {
- .nodes = osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(osm_l3_nodes),
- .lut_row_size = OSM_LUT_ROW_SIZE,
- .reg_freq_lut = OSM_REG_FREQ_LUT,
- .reg_perf_state = OSM_REG_PERF_STATE,
-};
-
-static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = {
- .nodes = epss_l3_nodes,
- .num_nodes = ARRAY_SIZE(epss_l3_nodes),
- .lut_row_size = EPSS_LUT_ROW_SIZE,
- .reg_freq_lut = EPSS_REG_FREQ_LUT,
- .reg_perf_state = EPSS_REG_PERF_STATE,
-};
-
-static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = {
- .nodes = osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(osm_l3_nodes),
- .lut_row_size = OSM_LUT_ROW_SIZE,
- .reg_freq_lut = OSM_REG_FREQ_LUT,
- .reg_perf_state = OSM_REG_PERF_STATE,
-};
-
-static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = {
- .nodes = osm_l3_nodes,
- .num_nodes = ARRAY_SIZE(osm_l3_nodes),
- .lut_row_size = OSM_LUT_ROW_SIZE,
- .reg_freq_lut = OSM_REG_FREQ_LUT,
- .reg_perf_state = OSM_REG_PERF_STATE,
-};
-
-static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = {
+static const struct qcom_osm_l3_desc epss_l3 = {
.nodes = epss_l3_nodes,
.num_nodes = ARRAY_SIZE(epss_l3_nodes),
.lut_row_size = EPSS_LUT_ROW_SIZE,
@@ -317,12 +285,12 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
}
static const struct of_device_id osm_l3_of_match[] = {
- { .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
- { .compatible = "qcom,sc7280-epss-l3", .data = &sc7280_icc_epss_l3 },
- { .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
- { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
- { .compatible = "qcom,sc8180x-osm-l3", .data = &sc8180x_icc_osm_l3 },
- { .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 },
+ { .compatible = "qcom,sc7180-osm-l3", .data = &osm_l3 },
+ { .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3 },
+ { .compatible = "qcom,sdm845-osm-l3", .data = &osm_l3 },
+ { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 },
+ { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 },
+ { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3 },
{ }
};
MODULE_DEVICE_TABLE(of, osm_l3_of_match);
--
2.37.3
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