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Message-ID: <20221028050940.27888-5-sarath.babu.naidu.gaddam@amd.com>
Date:   Thu, 27 Oct 2022 23:09:39 -0600
From:   Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@....com>
To:     <vkoul@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <lars@...afoo.de>,
        <adrianml@...mnos.upm.es>
CC:     <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <michal.simek@....com>,
        <radhey.shyam.pandey@....com>, <anirudha.sarangi@....com>,
        <harini.katakam@....com>, <sarath.babu.naidu.gaddam@....com>,
        <git@....com>
Subject: [PATCH 4/5] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count

From: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>

Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
Signed-off-by: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@....com>
---
 drivers/dma/xilinx/xilinx_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index b69e0482a50f..43737e0f3625 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -178,7 +178,7 @@
 #define XILINX_DMA_BD_SOP		BIT(27)
 #define XILINX_DMA_BD_EOP		BIT(26)
 #define XILINX_DMA_COALESCE_MAX		255
-#define XILINX_DMA_NUM_DESCS		255
+#define XILINX_DMA_NUM_DESCS		512
 #define XILINX_DMA_NUM_APP_WORDS	5
 
 /* AXI CDMA Specific Registers/Offsets */
-- 
2.25.1

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