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Message-ID: <61c0b62af62ddd0e98378159db2b7d94022c9bf5.camel@mediatek.com>
Date: Fri, 28 Oct 2022 17:24:36 +0800
From: Jianjun Wang <jianjun.wang@...iatek.com>
To: Frank Wunderlich <linux@...web.de>,
<linux-mediatek@...ts.infradead.org>
CC: Frank Wunderlich <frank-w@...lic-files.de>,
Ryder Lee <ryder.lee@...iatek.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
<linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: mediatek-gen3: add SoC based
clock config
Hi Frank,
After apply this patch, we found some dtbs_check error with the
following patch which adds the PCIe node for MT8195:
https://lore.kernel.org/linux-pci/20221020111925.30002-3-tinghan.shen@mediatek.com/
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dtb: pcie@...f0000
: clock-names: 5: 'top_133m' was expected
From schema: Documentation/devicetree/bindings/pci/mediatek-pcie-
gen3.yaml
arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r2.dtb: pcie@...f8000
: clock-names: 5: 'top_133m' was expected
From schema: Documentation/devicetree/bindings/pci/mediatek-pcie-
gen3.yaml
Did you get the same error when adding the PCIe node for MT7986?
Thanks.
On Tue, 2022-10-25 at 09:28 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> The PCIe driver covers different SOC which needing different clock
> configs. Define them based on compatible.
>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> Reviewed-by: Rob Herring <robh@...nel.org>
> ---
> v2:
> - fix typo in mediatek,mt8192-pcie
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++---
> --
> 1 file changed, 36 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml
> index c00be39af64e..98d3f0f1cd76 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -43,9 +43,6 @@ description: |+
> each set has its own address for MSI message, and supports 32 MSI
> vectors
> to generate interrupt.
>
> -allOf:
> - - $ref: /schemas/pci/pci-bus.yaml#
> -
> properties:
> compatible:
> oneOf:
> @@ -84,15 +81,7 @@ properties:
> maxItems: 6
>
> clock-names:
> - items:
> - - const: pl_250m
> - - const: tl_26m
> - - const: tl_96m
> - - const: tl_32k
> - - const: peri_26m
> - - enum:
> - - top_133m # for MT8192
> - - peri_mem # for MT8188/MT8195
> + maxItems: 6
>
> assigned-clocks:
> maxItems: 1
> @@ -138,6 +127,41 @@ required:
> - '#interrupt-cells'
> - interrupt-controller
>
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8192-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: top_133m
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt8188-pcie
> + - mediatek,mt8195-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: peri_mem
> +
> unevaluatedProperties: false
>
> examples:
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