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Message-ID: <20221029084514.GT125525@dragon>
Date: Sat, 29 Oct 2022 16:45:14 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, marex@...x.de, tharvey@...eworks.com,
vkoul@...nel.org, bhelgaas@...gle.com, lorenzo.pieralisi@....com,
alexander.stein@...tq-group.com, richard.leitner@...ux.dev,
devicetree@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...gutronix.de, linux-imx@....com
Subject: Re: [PATCH v1] soc: imx: imx8mp-blk-ctrl: Add PCIe SYSPLL
configurations
On Mon, Oct 24, 2022 at 01:43:09PM +0800, Richard Zhu wrote:
> Add PCIe SYSPLL configurations, thus the internal SYSPLL can be used as
> i.MX8MP PCIe reference clock.
>
> The following properties of PHY dts node should be changed accordingly.
> - Set 'fsl,refclk-pad-mode' as '<IMX8_PCIE_REFCLK_PAD_OUTPUT>'.
> - Change 'clocks' to '<&clk IMX8MP_CLK_HSIO_ROOT>'.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Applied, thanks!
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