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Message-ID: <c9562004-e519-1ba4-8fff-5ca586a8fca7@linaro.org>
Date: Sun, 30 Oct 2022 00:51:35 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
martin.petersen@...cle.com, jejb@...ux.ibm.com,
andersson@...nel.org, vkoul@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: konrad.dybcio@...ainline.org, robh+dt@...nel.org,
quic_cang@...cinc.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-scsi@...r.kernel.org
Subject: Re: [PATCH 02/15] phy: qcom-qmp-ufs: Add support for configuring PHY
in HS Series B mode
On 29/10/2022 17:16, Manivannan Sadhasivam wrote:
> Add separate tables_hs_b instance to allow the PHY driver to configure the
> PHY in HS Series B mode. The individual SoC configs need to supply the
> serdes register setting in tables_hs_b and the UFS driver can request the
> Series B mode by calling phy_set_mode() with mode set to PHY_MODE_UFS_HS_B.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
> --
With best wishes
Dmitry
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