linux-kernel - Re: [PATCH 04/15] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8250 SoC

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Message-ID: <e02498ab-f4f4-d7ec-dcd8-9340d301f572@linaro.org>
Date:   Sun, 30 Oct 2022 00:55:22 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        martin.petersen@...cle.com, jejb@...ux.ibm.com,
        andersson@...nel.org, vkoul@...nel.org,
        krzysztof.kozlowski+dt@...aro.org
Cc:     konrad.dybcio@...ainline.org, robh+dt@...nel.org,
        quic_cang@...cinc.com, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-phy@...ts.infradead.org, linux-scsi@...r.kernel.org
Subject: Re: [PATCH 04/15] phy: qcom-qmp-ufs: Add HS G4 mode support to SM8250
 SoC

On 29/10/2022 17:16, Manivannan Sadhasivam wrote:
> UFS PHY in SM8250 SoC is capable of operating at HS G4 mode. Hence, add the
> required register settings using the tables_hs_g4 struct instance. This
> also requires a separate qmp_phy_cfg for SM8250 instead of SM8150.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 68 ++++++++++++++++++++++++-
>   1 file changed, 67 insertions(+), 1 deletion(-)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

-- 
With best wishes
Dmitry