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Message-ID: <Y171ZEHpOydtR4dW@smile.fi.intel.com>
Date: Mon, 31 Oct 2022 00:06:28 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Xu Yilun <yilun.xu@...el.com>
Cc: matthew.gerlach@...ux.intel.com, hao.wu@...el.com,
russell.h.weight@...el.com, basheer.ahmed.muddebihal@...el.com,
trix@...hat.com, mdf@...nel.org, linux-fpga@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
tianfei.zhang@...el.com, corbet@....net, jirislaby@...nel.org,
geert+renesas@...der.be, niklas.soderlund+renesas@...natech.se,
macro@...am.me.uk, johan@...nel.org, lukas@...ner.de,
ilpo.jarvinen@...ux.intel.com, marpagan@...hat.com
Subject: Re: [PATCH v4 3/4] fpga: dfl: add basic support DFHv1
On Sat, Oct 29, 2022 at 09:08:44PM +0800, Xu Yilun wrote:
> On 2022-10-20 at 14:26:09 -0700, matthew.gerlach@...ux.intel.com wrote:
> > struct dfl_feature_info {
> > u16 fid;
> > u8 revision;
> > + u8 dfh_version;
> > struct resource mmio_res;
> > void __iomem *ioaddr;
> > struct list_head node;
> > unsigned int irq_base;
> > unsigned int nr_irqs;
> > + unsigned int param_size;
> > + u64 params[];
> > };
...
> > + finfo = kzalloc(sizeof(*finfo) + dfh_psize, GFP_KERNEL);
This probably may use something from overflow.h.
> The u64 flexible array in the structure, but seems dfh_get_psize could
> not garantee 64bit aligned size.
>
> What's the mandatory alignment of param data? If 64bit aligned, bit 33-34
> of PARAM_HDR should be reserved. If 32bit aligned, finfo:params should be
> u32[].
Isn't it guaranteed by the C standard / architecture ABI?
--
With Best Regards,
Andy Shevchenko
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