linux-kernel - Re: [PATCH 00/15] Introduce Architectural LBR for vPMU

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Message-ID: <8615d3a3-6d1c-2982-7dd8-4e831ae42ce7@intel.com>
Date:   Sun, 30 Oct 2022 14:06:43 +0800
From:   "Yang, Weijiang" <weijiang.yang@...el.com>
To:     "Christopherson,, Sean" <seanjc@...gle.com>
CC:     "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "like.xu.linux@...il.com" <like.xu.linux@...il.com>,
        "kan.liang@...ux.intel.com" <kan.liang@...ux.intel.com>,
        "Wang, Wei W" <wei.w.wang@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 00/15] Introduce Architectural LBR for vPMU


On 10/21/2022 10:14 AM, Yang, Weijiang wrote:
> On 9/2/2022 11:44 AM, Yang, Weijiang wrote:
>> On 9/1/2022 10:23 PM, Sean Christopherson wrote:
>>> On Wed, Aug 31, 2022, Yang Weijiang wrote:
>>>> The old patch series was queued in KVM/queue for a while and finally
>>>> moved to below branch after Paolo's refactor. This new patch set is
>>>> built on top of Paolo's work + some fixes, it's tested on legacy
>>>> platform
[...]
>> What are fixed in this series:
>>
>> 1.  An missing of -1: if ((entry->eax & 0xff) != (1 << (depth_bit - 1)))
>>
>> 2.  Removed exit bit check in  cpu_has_vmx_arch_lbr(void), moved it to
>> setup_vmcs_config().
>>
>> 3.  A redundant check kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) in
>> kvm_check_cpuid().
>>
>> 4.  KUT/selftest failures due to lack of MSR_ARCH_LBR_CTL and
>> MSR_ARCH_LBR_DEPTH in kvm_set_msr_common() before validate pmu msrs.
>>
>> 5.  Calltrace in L1 when L1 tried to vmcs_write64(GUEST_IA32_LBR_CTL,
>> 0) in vmx_vcpu_reset(), use cpu_has_vmx_arch_lbr() instead.
>>
>> 6.  Removed VM_ENTRY_LOAD_IA32_LBR_CTL and VM_EXIT_CLEAR_IA32_LBR_CTL
>> from exec_control in nested case.
>>
> Hi, Sean,
>
> Could you kindly review this post and give some comments on the series
> so that I can prepare next version?
>
> Thanks!

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