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Message-ID: <8b0f9631b06e5ff36b691389285e4168125735ad.camel@mediatek.com>
Date:   Mon, 31 Oct 2022 06:58:55 +0000
From:   Mengqi Zhang (张梦琦) 
        <Mengqi.Zhang@...iatek.com>
To:     "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        Wenbin Mei (梅文彬) 
        <Wenbin.Mei@...iatek.com>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        Chaotian Jing (井朝天) 
        <Chaotian.Jing@...iatek.com>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 1/2] mmc: mtk-sd: add Inline Crypto Engine support

On Tue, 2022-10-18 at 11:50 +0200, AngeloGioacchino Del Regno wrote:
> Il 17/10/22 16:20, Mengqi Zhang ha scritto:
> > add crypto clock control and ungate it before CQHCI init.
> > 
> > Signed-off-by: Mengqi Zhang <mengqi.zhang@...iatek.com>
> 
> Hello Mengqi,
> I'm a bit surprised that enabling ICE only requires enabling a clock
> as
> on downstream code I see some SMC calls to
> MTK_SIP_KERNEL_HW_FDE_MSDC_CTL.
> 
> Can you please explain why SMC calls are not needed here?
> 
> Thanks,
> Angelo

> Hi Angelo,
> 
> In some MTK SoCs, we need set a encrypto enable bit
> MTK_SIP_KERNEL_HW_FDE_MSDC_CTL in secure world, so we use SMC call to
> finish it.
> But not every MTK SoC need to set this bit in secure world. This
> patch is for these SoCs.
> As for SMC call, we haven't found a proper way to deal with it, we'll
> do it later.
> 
> Thanks,
> Mengqi.Zhang
> 

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