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Message-ID: <e3876fd8-e5e0-d7af-252c-8bba5ec9e7e0@microchip.com>
Date:   Mon, 31 Oct 2022 10:27:15 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Durai.ManickamKR@...rochip.com>, <Nicolas.Ferre@...rochip.com>,
        <Cristian.Birsan@...rochip.com>, <Hari.PrasathGE@...rochip.com>,
        <davem@...emloft.net>, <krzysztof.kozlowski+dt@...aro.org>,
        <alexandre.belloni@...tlin.com>, <arnd@...db.de>, <olof@...om.net>,
        <soc@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <Manikandan.M@...rochip.com>,
        <Kavyasree.Kotagiri@...rochip.com>, <Horatiu.Vultur@...rochip.com>
Subject: Re: [PATCHv1 3/8] ARM: dts: at91: sam9x60: Add flexcom definitions

On 31.10.2022 05:36, Durai Manickam KR wrote:
> Add the flexcom definitions to the SoC specifc DTSI file.
> 
> Signed-off-by: Durai Manickam KR <durai.manickamkr@...rochip.com>
> Signed-off-by: Hari Prasath <Hari.PrasathGE@...rochip.com>
> Signed-off-by: Manikandan M <manikandan.m@...rochip.com>

For a cleaner view you can use [] to specify each ones contribution. See
https://www.kernel.org/doc/html/v4.12/process/submitting-patches.html#developer-s-certificate-of-origin-1-1

> ---
>  arch/arm/boot/dts/sam9x60.dtsi | 52 ++++++++++++++++++++++++++++++++--
>  1 file changed, 50 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
> index ef07d281a3db..fd4f5d43f7bb 100644
> --- a/arch/arm/boot/dts/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/sam9x60.dtsi
> @@ -170,6 +170,16 @@ flx4: flexcom@...00000 {
>  				#size-cells = <1>;
>  				ranges = <0x0 0xf0000000 0x800>;
>  				status = "disabled";
> +
> +				spi4: spi@400 {
> +					compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> +					reg = <0x400 0x200>;
> +					interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
> +					clock-names = "spi_clk";
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
>  			};
>  
>  			flx5: flexcom@...04000 {
> @@ -180,6 +190,26 @@ flx5: flexcom@...04000 {
>  				#size-cells = <1>;
>  				ranges = <0x0 0xf0004000 0x800>;
>  				status = "disabled";
> +
> +				uart5: serial@200 {
> +					compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> +					reg = <0x200 0x200>;
> +					interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
> +					dmas = <&dma0
> +						(AT91_XDMAC_DT_MEM_IF(0) |
> +						 AT91_XDMAC_DT_PER_IF(1) |
> +						 AT91_XDMAC_DT_PERID(10))>,
> +						<&dma0
> +						(AT91_XDMAC_DT_MEM_IF(0) |
> +						 AT91_XDMAC_DT_PER_IF(1) |
> +						 AT91_XDMAC_DT_PERID(11))>;
> +					dma-names = "tx", "rx";
> +					clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
> +					clock-names = "usart";
> +					atmel,use-dma-rx;
> +					atmel,use-dma-tx;
> +					status = "disabled";
> +				};
>  			};
>  
>  			dma0: dma-controller@...08000 {
> @@ -390,6 +420,15 @@ flx6: flexcom@...10000 {
>  				#size-cells = <1>;
>  				ranges = <0x0 0xf8010000 0x800>;
>  				status = "disabled";
> +
> +				i2c6: i2c@600 {
> +					compatible = "microchip,sam9x60-i2c";
> +					reg = <0x600 0x200>;
> +					interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
> +					clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
>  			};
>  
>  			flx7: flexcom@...14000 {
> @@ -416,10 +455,19 @@ flx0: flexcom@...1c000 {
>  				compatible = "atmel,sama5d2-flexcom";
>  				reg = <0xf801c000 0x200>;
>  				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
> -				#address-cells = <1>;
> -				#size-cells = <1>;
>  				ranges = <0x0 0xf801c000 0x800>;
>  				status = "disabled";
> +
> +				i2c0: i2c@600 {
> +					compatible = "microchip,sam9x60-i2c";
> +					reg = <0x600 0x200>;
> +					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
> +					atmel,fifo-size = <16>;
> +					status = "disabled";
> +				};
>  			};
>  
>  			flx1: flexcom@...20000 {

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