lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-ID: <20221031172301.GA1198954@bhelgaas>
Date:   Mon, 31 Oct 2022 12:23:01 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Vidya Sagar <vidyas@...dia.com>
Cc:     "sr@...x.de" <sr@...x.de>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: ECRC configuration if AER is owned by the firmware

On Mon, Oct 31, 2022 at 10:35:40PM +0530, Vidya Sagar wrote:
> Hi,
> With the top of the tree codebase, pcie_set_ecrc_checking() is called from
> pci_aer_init().
> This flow doesn't really take into account the ownership of the AER
> registers, and it makes sense in the case of the Linux kernel owning the
> AER.
> But, if the owner of AER is firmware and not OS, then, ideally, any
> register/fields (including ECRC bits) are not supposed to be touched by the
> OS.
> Is my understanding correct?
> If so, then, isn't the current code violating that rule?
> Could you please comment on it?

I think you are correct and the current code violates the rule.

Bjorn

P.S.  Your message was a multi-part message that will likely be
rejected by the vger mailing lists:
http://vger.kernel.org/majordomo-info.html

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ