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Date: Tue, 1 Nov 2022 07:27:04 -0400 From: Sasha Levin <sashal@...nel.org> To: linux-kernel@...r.kernel.org, stable@...r.kernel.org Cc: Benjamin Gaignard <benjamin.gaignard@...labora.com>, Ezequiel Garcia <ezequiel@...guardiasur.com.ar>, Hans Verkuil <hverkuil-cisco@...all.nl>, Mauro Carvalho Chehab <mchehab@...nel.org>, Sasha Levin <sashal@...nel.org>, p.zabel@...gutronix.de, gregkh@...uxfoundation.org, linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org, linux-staging@...ts.linux.dev Subject: [PATCH AUTOSEL 6.0 12/34] media: hantro: HEVC: Fix auxilary buffer size calculation From: Benjamin Gaignard <benjamin.gaignard@...labora.com> [ Upstream commit 8a438580a09ecef78cd6c5825d628b4d5ae1c127 ] SAO and FILTER buffers size depend of the bit depth. Make sure we have enough space for 10bit bitstreams. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com> Reviewed-by: Ezequiel Garcia <ezequiel@...guardiasur.com.ar> Signed-off-by: Hans Verkuil <hverkuil-cisco@...all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@...nel.org> Signed-off-by: Sasha Levin <sashal@...nel.org> --- drivers/staging/media/hantro/hantro_hevc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_hevc.c b/drivers/staging/media/hantro/hantro_hevc.c index b990bc98164c..9383fb7081f6 100644 --- a/drivers/staging/media/hantro/hantro_hevc.c +++ b/drivers/staging/media/hantro/hantro_hevc.c @@ -104,7 +104,7 @@ static int tile_buffer_reallocate(struct hantro_ctx *ctx) hevc_dec->tile_bsd.cpu = NULL; } - size = VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1); + size = (VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; hevc_dec->tile_filter.cpu = dma_alloc_coherent(vpu->dev, size, &hevc_dec->tile_filter.dma, GFP_KERNEL); @@ -112,7 +112,7 @@ static int tile_buffer_reallocate(struct hantro_ctx *ctx) goto err_free_tile_buffers; hevc_dec->tile_filter.size = size; - size = VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1); + size = (VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; hevc_dec->tile_sao.cpu = dma_alloc_coherent(vpu->dev, size, &hevc_dec->tile_sao.dma, GFP_KERNEL); -- 2.35.1
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