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Message-ID: <bdb64d3b-bfe2-6505-c24a-770675b697bb@huawei.com>
Date: Tue, 1 Nov 2022 19:48:07 +0800
From: cuigaosheng <cuigaosheng1@...wei.com>
To: Peter Zijlstra <peterz@...radead.org>
CC: <tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
<dave.hansen@...ux.intel.com>, <x86@...nel.org>, <hpa@...or.com>,
<tony.luck@...el.com>, <pawan.kumar.gupta@...ux.intel.com>,
<pbonzini@...hat.com>, <chenyi.qiang@...el.com>,
<jithu.joseph@...el.com>, <alexs@...nel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86/cpu: fix undefined behavior in bit shift for
intel_detect_tlb
We don't need to add UBSAN calltrace, so I have merged the patch with another
patch("x86/cpu: replacing the open-coded shift with BIT(x)"), please ignore
this patch,thanks for review this patch!
On 2022/10/31 20:32, Peter Zijlstra wrote:
> On Mon, Oct 31, 2022 at 01:30:57PM +0100, Peter Zijlstra wrote:
>> On Mon, Oct 31, 2022 at 07:43:40PM +0800, Gaosheng Cui wrote:
>>> Shifting signed 32-bit value by 31 bits is undefined, so changing
>>> significant bit to unsigned. The UBSAN warning calltrace like below:
>>>
>>> UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
>>> left shift of 1 by 31 places cannot be represented in type 'int'
>> Is it really? Shouldn't -fstrict-overflow define this case?
> -fno-strict-overflow that is, which implies -fwrapv which ensures 2s
> complement, at which point shifting signed numbers is fully defined.
>
> .
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