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Message-ID: <033a852b31aa8ce3598e968f61e4a75251f1234e.camel@mediatek.com>
Date:   Tue, 1 Nov 2022 12:12:43 +0000
From:   Jianjun Wang (王建军) 
        <Jianjun.Wang@...iatek.com>
To:     "robh@...nel.org" <robh@...nel.org>,
        "frank-w@...lic-files.de" <frank-w@...lic-files.de>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        Ryder Lee <Ryder.Lee@...iatek.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: PCI: mediatek-gen3: add SoC based
 clock config

On Mon, 2022-10-31 at 09:43 -0500, Rob Herring wrote:
> On Sat, Oct 29, 2022 at 07:58:05PM +0200, Frank Wunderlich wrote:
> > The PCIe driver covers different SOC which needing different clock
> > configs. Define them based on compatible.
> > 
> > Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> > ---
> > v2:
> > - fix typo in mediatek,mt8192-pcie
> > v3:
> > - remove contains to match only if compatible is no fallback
> >   tested with series "Add driver nodes for MT8195 SoC" and mt7986
> >   pcie-nodes, dtbs_check is now clean
> > ---
> >  .../bindings/pci/mediatek-pcie-gen3.yaml      | 47 ++++++++++++++-
> > ----
> >  1 file changed, 35 insertions(+), 12 deletions(-)
> 
> Reviewed-by: Rob Herring <robh@...nel.org>

Acked-by: Jianjun Wang <jianjun.wang@...iatek.com>

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