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Message-ID: <Y2Eui+kKvwj8ip+T@dhcp22.suse.cz>
Date: Tue, 1 Nov 2022 15:34:51 +0100
From: Michal Hocko <mhocko@...e.com>
To: "Huang, Ying" <ying.huang@...el.com>
Cc: Bharata B Rao <bharata@....com>,
Aneesh Kumar K V <aneesh.kumar@...ux.ibm.com>,
linux-mm@...ck.org, linux-kernel@...r.kernel.org,
Andrew Morton <akpm@...ux-foundation.org>,
Alistair Popple <apopple@...dia.com>,
Dan Williams <dan.j.williams@...el.com>,
Dave Hansen <dave.hansen@...el.com>,
Davidlohr Bueso <dave@...olabs.net>,
Hesham Almatary <hesham.almatary@...wei.com>,
Jagdish Gediya <jvgediya.oss@...il.com>,
Johannes Weiner <hannes@...xchg.org>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Tim Chen <tim.c.chen@...el.com>, Wei Xu <weixugc@...gle.com>,
Yang Shi <shy828301@...il.com>
Subject: Re: [RFC] memory tiering: use small chunk size and more tiers
On Mon 31-10-22 09:33:49, Huang, Ying wrote:
[...]
> In the upstream implementation, 4 tiers are possible below DRAM. That's
> enough for now. But in the long run, it may be better to define more.
> 100 possible tiers below DRAM may be too extreme.
I am just curious. Is any configurations with more than couple of tiers
even manageable? I mean applications have been struggling even with
regular NUMA systems for years and vast majority of them is largerly
NUMA unaware. How are they going to configure for a more complex system
when a) there is no resource access control so whatever you aim for
might not be available and b) in which situations there is going to be a
demand only for subset of tears (GPU memory?) ?
Thanks!
--
Michal Hocko
SUSE Labs
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