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Message-ID: <9d13da28-e7d5-f8d4-0e99-c89560d37833@kernel.org>
Date: Tue, 1 Nov 2022 10:34:19 -0500
From: Dinh Nguyen <dinguyen@...nel.org>
To: Stephen Boyd <sboyd@...nel.org>, jh80.chung@...sung.com
Cc: ulf.hansson@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCHv6 5/6] clk: socfpga: remove the setting of clk-phase for
sdmmc_clk
On 10/27/22 16:39, Stephen Boyd wrote:
> Quoting Dinh Nguyen (2022-10-26 07:16:30)
>> Now that the SDMMC driver supports setting the clk-phase, we can remove
>> the need to do it in the clock driver.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
>> ---
>
> Do you want to take this through mmc tree?
Yes, I'll do that.
>
> Acked-by: Stephen Boyd <sboyd@...nel.org>
Thanks!
Dinh
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