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Message-ID: <ebc45ad9-9c26-9598-9e54-62d93be8de31@intel.com>
Date:   Tue, 1 Nov 2022 19:28:07 +0200
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Victor Shih <victorshihgli@...il.com>, ulf.hansson@...aro.org
Cc:     linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
        benchuanggli@...il.com, HL.Liu@...esyslogic.com.tw,
        Greg.tu@...esyslogic.com.tw, takahiro.akashi@...aro.org,
        dlunev@...omium.org, Victor Shih <victor.shih@...esyslogic.com.tw>
Subject: Re: [PATCH V5 00/26] Add support UHS-II for GL9755

On 19/10/22 14:06, Victor Shih wrote:
> Summary
> =======
> These patches[1] support UHS-II and fix GL9755 UHS-II compatibility.
> 
> About UHS-II, roughly deal with the following three parts:
> 1) A UHS-II detection and initialization:
> - Host setup to support UHS-II (Section 3.13.1 Host Controller Setup Sequence
>   [2]).
> - Detect a UHS-II I/F (Section 3.13.2 Card Interface Detection Sequence[2]).
> - In step(9) of Section 3.13.2 in [2], UHS-II initialization is include Section
>   3.13.3 UHS-II Card Initialization and Section 3.13.4 UHS-II Setting Register
>   Setup Sequence.
> 
> 2) Send Legacy SD command through SD-TRAN
> - Encapsulated SD packets are defined in SD-TRAN in order to ensure Legacy SD
>   compatibility and preserve Legacy SD infrastructures (Section 7.1.1 Packet
>   Types and Format Overview[3]).
> - Host issue a UHS-II CCMD packet or a UHS-II DCMD (Section 3.13.5 UHS-II
>   CCMD Packet issuing and Section 3.13.6 UHS-II DCMD Packet issuing[2]).
> 
> 3) UHS-II Interrupt
> - Except for UHS-II error interrupts, most interrupts share the original
>   interrupt registers.
> 
> Patch structure
> ===============
> patch#1-#6:  for core
> patch#7-#25: for sdhci
> patch#26:    for GL9755

Thanks for putting this together.

I haven't looked at all the patches, but have requested quite
a lot of small changes, so there should be enough to be going
on with for now.

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