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Message-Id: <20221102190611.283546-3-nfraprado@collabora.com>
Date: Wed, 2 Nov 2022 15:06:08 -0400
From: Nícolas F. R. A. Prado
<nfraprado@...labora.com>
To: Matthias Brugger <matthias.bgg@...il.com>
Cc: kernel@...labora.com, Chen-Yu Tsai <wenst@...omium.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Nícolas F. R. A. Prado
<nfraprado@...labora.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org
Subject: [PATCH v3 2/5] arm64: dts: mediatek: asurada: Add display backlight
Add the display backlight for the Asurada platform. It relies on the
display PWM controller, so also enable and configure this component.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Tested-by: Chen-Yu Tsai <wenst@...omium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
---
(no changes since v1)
.../boot/dts/mediatek/mt8192-asurada.dtsi | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
index fafca7428539..666021ca4d4f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
@@ -23,6 +23,16 @@ memory@...00000 {
reg = <0 0x40000000 0 0x80000000>;
};
+ backlight_lcd0: backlight-lcd0 {
+ compatible = "pwm-backlight";
+ pwms = <&pwm0 0 500000>;
+ power-supply = <&ppvar_sys>;
+ enable-gpios = <&pio 152 0>;
+ brightness-levels = <0 1023>;
+ num-interpolated-steps = <1023>;
+ default-brightness-level = <576>;
+ };
+
pp1000_dpbrdg: regulator-1v0-dpbrdg {
compatible = "regulator-fixed";
regulator-name = "pp1000_dpbrdg";
@@ -838,6 +848,17 @@ pins-pcie-en-pp3300-wlan {
};
};
+ pwm0_pins: pwm0-default-pins {
+ pins-pwm {
+ pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>;
+ };
+
+ pins-inhibit {
+ pinmux = <PINMUX_GPIO152__FUNC_GPIO152>;
+ output-high;
+ };
+ };
+
scp_pins: scp-pins {
pins-vreq-vao {
pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
@@ -899,6 +920,13 @@ &pmic {
interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
};
+&pwm0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins>;
+};
+
&scp {
status = "okay";
--
2.38.1
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