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Message-ID: <CAPDyKFowa5mXVTU+ZcoSRp8daz=O=AJ1BdnH2roCG-hmB3Bz9Q@mail.gmail.com>
Date: Wed, 2 Nov 2022 16:13:42 +0100
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Mengqi Zhang <mengqi.zhang@...iatek.com>
Cc: chaotian.jing@...iatek.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
wenbin.mei@...iatek.com, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bingdings: mmc: Mediatek: add ICE clock
On Mon, 17 Oct 2022 at 16:20, Mengqi Zhang <mengqi.zhang@...iatek.com> wrote:
>
> Document the binding for crypto clock of the Inline Crypto Engine
> of Mediatek SoCs.
>
> Signed-off-by: Mengqi Zhang <mengqi.zhang@...iatek.com>
> ---
> Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> index d8e1e2e9adf2..f93d686e2911 100644
> --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> @@ -57,6 +57,7 @@ properties:
> - description: peripheral bus clock gate (required for MT8192).
> - description: AXI bus clock gate (required for MT8192).
> - description: AHB bus clock gate (required for MT8192).
> + - description: crypto clock used for data encrypt/decrypt (optional).
>
> clock-names:
> minItems: 2
> @@ -69,6 +70,7 @@ properties:
> - const: pclk_cg
> - const: axi_cg
> - const: ahb_cg
> + - const: crypto
Looks like minItems/maxItems for clocks needs to be updated too.
>
> interrupts:
> description:
> --
> 2.25.1
>
Kind regards
Uffe
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