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Date:   Thu, 3 Nov 2022 16:18:12 +0100
From:   Marek Szyprowski <m.szyprowski@...sung.com>
To:     Johan Hovold <johan@...nel.org>, Stefan Agner <stefan@...er.ch>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, linux-kernel@...r.kernel.org,
        Johan Hovold <johan+linaro@...nel.org>,
        Matthias Kaehlcke <mka@...omium.org>,
        stable <stable@...nel.org>, regressions@...ts.linux.dev,
        krzk@...nel.org
Subject: Re: [PATCH stable-5.15 3/3] usb: dwc3: disable USB core PHY
 management

Hi Johan,

On 03.11.2022 15:49, Johan Hovold wrote:
> On Thu, Oct 27, 2022 at 02:45:15PM +0200, Johan Hovold wrote:
>> On Wed, Oct 26, 2022 at 03:11:00PM +0200, Stefan Agner wrote:
>>> The user reports the S-ATA disk is *not* recognized with that patch
>>> applied.
>> I just noticed a mistake in the instrumentation patch I sent you. Could
>> you try moving the calibrations calls after dwc3_host_init() (e.g. as in
>> the second chunk in the diff below)?
>>
>> As mentioned in the commit message for a0a465569b45 ("usb: dwc3: remove
>> generic PHY calibrate() calls"), this may not work if the xhci-plat
>> driver is built as a module and there are some corner cases that it does
>> not cover.
>>
>> It seems we should revert the offending commit and then try to find some
>> time to untangle this mess, but please check if the below addresses the
>> issue first so we know what the problem is.
>>
>> I'll prepare a revert in the meantime.
> I've now posted the revert, but please do check if the below patch was
> enough to resolve the immediate issue.

The below patch was a half-fix. It worked only if both dwc3 and 
xhci_plat_hcd were compiled into the kernel. Afair Debian-based distros 
used xhci compiled as a module, so this didn't work for that case due to 
timing issues.


>
> Johan
>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 31156d4dec9f..37d49a394912 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -197,6 +197,8 @@ static void __dwc3_set_mode(struct work_struct *work)
>>                                  otg_set_vbus(dwc->usb2_phy->otg, true);
>>                          phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
>>                          phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
>> +                       phy_calibrate(dwc->usb2_generic_phy);
>> +                       phy_calibrate(dwc->usb3_generic_phy);
>>                          if (dwc->dis_split_quirk) {
>>                                  reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
>>                                  reg |= DWC3_GUCTL3_SPLITDISABLE;
>> @@ -1391,6 +1393,9 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
>>                  ret = dwc3_host_init(dwc);
>>                  if (ret)
>>                          return dev_err_probe(dev, ret, "failed to initialize host\n");
>> +
>> +               phy_calibrate(dwc->usb2_generic_phy);
>> +               phy_calibrate(dwc->usb3_generic_phy);
>>                  break;
>>          case USB_DR_MODE_OTG:
>>                  INIT_WORK(&dwc->drd_work, __dwc3_set_mode);

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland

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