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Message-Id: <20221103025030.78371-7-jiaxi.chen@linux.intel.com>
Date: Thu, 3 Nov 2022 10:50:28 +0800
From: Jiaxi Chen <jiaxi.chen@...ux.intel.com>
To: kvm@...r.kernel.org
Cc: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
seanjc@...gle.com, pbonzini@...hat.com, ndesaulniers@...gle.com,
alexandre.belloni@...tlin.com, peterz@...radead.org,
jpoimboe@...nel.org, chang.seok.bae@...el.com,
pawan.kumar.gupta@...ux.intel.com, babu.moger@....com,
jmattson@...gle.com, sandipan.das@....com, tony.luck@...el.com,
sathyanarayanan.kuppuswamy@...ux.intel.com, fenghua.yu@...el.com,
keescook@...omium.org, nathan@...nel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 6/8] x86: KVM: Advertise AVX-VNNI-INT8 CPUID to user space
AVX-VNNI-INT8 is a new set of instructions in the latest Intel platform
Sierra Forest, aims for the platform to have superior AI capabilities.
This instruction multiplies the individual bytes of two unsigned or
unsigned source operands, then adds and accumulates the results into the
destination dword element size operand.
The bit definition:
CPUID.(EAX=7,ECX=1):EDX[bit 4]
This CPUID is exposed to user space. Besides, there is no other VMX
control for this instruction.
Signed-off-by: Jiaxi Chen <jiaxi.chen@...ux.intel.com>
---
arch/x86/kvm/cpuid.c | 5 ++++-
arch/x86/kvm/reverse_cpuid.h | 5 +++++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index e84c6216a72c..06dacf71ff9c 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -661,6 +661,9 @@ void kvm_set_cpu_caps(void)
F(AVX_IFMA)
);
+ kvm_cpu_cap_init_scattered(CPUID_7_1_EDX,
+ F(AVX_VNNI_INT8));
+
kvm_cpu_cap_mask(CPUID_D_1_EAX,
F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd
);
@@ -914,9 +917,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
goto out;
cpuid_entry_override(entry, CPUID_7_1_EAX);
+ cpuid_entry_override(entry, CPUID_7_1_EDX);
entry->ebx = 0;
entry->ecx = 0;
- entry->edx = 0;
}
break;
case 0xa: { /* Architectural Performance Monitoring */
diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index 954c0ceb1e90..819b4e0b13a3 100644
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -14,6 +14,7 @@
enum kvm_only_cpuid_leafs {
CPUID_12_EAX = NCAPINTS,
CPUID_7_1_EAX,
+ CPUID_7_1_EDX,
NR_KVM_CPU_CAPS,
NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
@@ -32,6 +33,9 @@ enum kvm_only_cpuid_leafs {
#define X86_FEATURE_AMX_FP16 KVM_X86_FEATURE(CPUID_7_1_EAX, 21)
#define X86_FEATURE_AVX_IFMA KVM_X86_FEATURE(CPUID_7_1_EAX, 23)
+/* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
+#define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
+
struct cpuid_reg {
u32 function;
u32 index;
@@ -56,6 +60,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
[CPUID_7_1_EAX] = { 7, 1, CPUID_EAX},
[CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX},
[CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
+ [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX},
};
/*
--
2.27.0
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